sp6200_6201

DESCRIPTION

■ Laptop, Notebooks and Palmtop Computers ■ Battery-Powered Equipment ■ Consumer/ Personal Electronics ■ SMPS Post-Regulator ■ DC-to-DC Modules ■ Medical Devices ■ Data Cable ■ Pagers

The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed and ease of use. These LDOs offer extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guarantee stability with a 1µF ceramic output capacitor. They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. An enable feature is provided on all versions.

The SP6200/6201 is available in fixed and adjustable output voltage versions in tiny DFN and small SOT-23-5 packages.A V OUT good indicator is provided on all fixed output versions.

Enable

Shutdown

TYPICAL APPLICATION CIRCUIT

ELECTRICAL CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS, NOTE 1

These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.

Supply Input Voltage (V IN ).............................-2V to 7V Output Voltage (V OUT ).........................-0.6 to (V IN +1V)Enable Input Voltage (V EN )............................-2V to 7V Power Dissipation (P D )..........Internally Limited, Note 3Lead Temperature (soldering 5s).......................260°C Storage Temperature ........................-65˚C to +150˚C

OPERATING RATINGS, NOTE 2

Input Voltage (V IN )..................................+2.5V to +6V Enable Input Voltage (V EN )..........................0V to +6V Junction Temperature (T J )................-40˚C to +125˚C Thermal Resistance (See Note 3):

SOT-23-5 (θJA )...................................................90˚C/W 8 Pin DFN (θJA )............................................ .....59˚C/W

(See Note 3)

V IN = V OUT +1V, V O = 5V for ADJ, I L = 100µA, C IN = 1.0µF, C OUT = 1.0µF, T J = 25°C , unless otherwise specified. The ♦ denotes the specifications which apply over the full operating temperature range, unless otherwise specified.

PARAMETER

MIN TYP MAX UNIT ♦CONDITIONS

Output Voltage Accuracy, (V O )-22%Variation from specified V OUT -33

%♦Reference Voltage

1.213

1.250 1.287

V ♦

Adjustable version only

Output Voltage Temperature 60ppm/ °C

Coefficient, Note 4, (∆V O /∆T)Minimum Supply Voltage

2.50 2.70V I L = 100µA 2.55 2.80V I L = 50mA 2.70 2.95V I L = 100mA

3.00 3.50V I C = 200mA

Line Regulation, (∆V O / V IN )0.030.2%/ V ♦V IN = (V OUT + 1V) to 6V Load Regulation, Note 5, (∆V O / V O )

0.070.25%♦I L = 0.1mA to 100mA, SP62000.14

0.50

%

♦

I L = 0.1mA to 200mA, SP6201

SP6200-1.5V & 1.8 Load Regulation 0.31%I L = 0.1mA to 100mA, V IN = 2.95V SP6201-1.5V & 1.8 Load Regulation 0.3 1 % I L = 0.1mA to 200mA, V IN = 3.5V Dropout Voltage, Note 6, (V IN – V O )0.24mV I L = 100µA (Not applicable to voltage options below 7mV ♦

2.7V)

70120mV I L = 50mA 160mV ♦

160250mV I L = 100mA 300mV ♦

320

400mV I L = 200mA, SP6201 Only 500mV ♦Shutdown Quiescent Current, (I GND )0.011µA ♦V EN ≥ 0.4V

Ground Pin Current, Note 7, (I GND )

2840µA V EN ≥ 2.0V, I L = 100µA

45µA ♦110200µA V EN ≥2.0V, I L = 100mA, SP6200250µA ♦ only (for 1.5 & 1.8, V IN = 2.95)200

400µA V EN ≥2.0V, I L = 200mA, SP6201500

µA ♦

Only (for 1.5 & 1.8, V IN = 3.5)Power Supply Rejection Ratio,78Frequency =100Hz, IL =10mA (PSRR)

40dB Frequency = 400Hz, IL=10mA Current Limit, (I CL )100140200mA ♦SP6200300

420600mA ♦

SP6201Thermal Limit

162°C Turns On 147

°C

Turns Off

Note 3. The maximum allowable power dissipation at any T

A (ambient temperature) is P

D (MAX)

= (T

J(MAX)

– T

A

) / θ

ϑA

.

Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will

go into thermal shutdown. The θ

JA of the SP6200/6201 (all versions) is 90°C/W for the SOT-23-5 and 59°C/W for

the DFN package on a standard 4 layer board (see “Thermal Considerations” section for further details).

Note 4. Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.

Note 5. Load Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range; from 0.1mA to 100mA, SP6200; from 0.1mA to 200mA, SP6201. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Not applicable to output voltages less than 2.5V.

Note 6. Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at 1V differential. Not applicable to output voltages less than 2.7V.

Note 7. Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of the load current plus the ground pin current.

Note 8. Thermal regulation is defined as the change in output voltage at a time ”t” after a change in power dissipation

is applied, excluding load or line regulation effects. Specifications are for a 100mA load pulse at V

IN = 6V for t = 10ms.

ELECTRICAL CHARACTERISTICS: Continued

V

IN = V

OUT

+1V, V

O

= 5V for ADJ, I

L

= 100µA, C

IN

= 1.0µF, C

OUT

= 1.0µF, T

J

= 25°C , unless otherwise specified. The ♦denotes the

specifications which apply over the full operating temperature range, unless otherwise specified.

PARAMETER MIN TYP MAX UNITS♦CONDITIONS Thermal Regulation,0.05%/W

Note 8, (∆V O/∆P D)

Output Noise, (e no)I L = 50mA, C L = 1µF

150µVrms0.1µF from V OUT to Adj.

10Hz to 100kHz ENABLE INPUT

Enable Input Logic-Low Voltage,0.4V♦Regulator Shutdown (V IL)

Enable Input Logic-High Voltage, 1.6V♦Regulator Enabled (V IH)

Enable Input Current, (I IL), (I IH)0.011µA♦V IL < 0.4V

0.011µA♦V IH > 2.0V

Reset Not Output-2-4-6%Threshold

Figure 2. Adjustable Voltage Regulator

PIN DESCRIPTION

PIN NUMBER NAME FUNCTION

1IN Supply Input

2GND Ground

3EN Enable/Shutdown (Input): CMOS or TTL compatible

input. Logic high = enable, logic low = shutdown 4RSN (Reset Not)Open drain indicating that V OUT is good

4ADJ Adjustable (Input): Adjustable regulator feedback

input. Connect resistor voltage divider.

5OUT Regulator Output

PIN NUMBER NAME(8 Pin DFN) FUNCTION

1NC No Connect

2VIN Supply Input

3 VOUT Regulator Input

4NC No Connect

5RSN Open drain indicating that V OUT is good

6NC No Connect

7GND Ground

8EN Enable/Shutdown (Input): CMOS or TTL compatible

input. Logic high = enable, logic low = shutdownGeneral Overview

The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed and ease of use. These LDOs offer extremely low quiescent cur-rent which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guar-antee stability with a 1µF ceramic output ca-pacitor. They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High fre-quency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. Thus, overall system accuracy is maintained under all DC and AC conditions. Enable feature is pro-vided on all versions. A Vout good indicator (RSN pin) is provided in all the fixed output voltage devices. An adjustable output version is also available. Current Limit and Thermal pro-tection is provided internally and is well con-trolled.

Architecture

The SP6200 and SP6201 are only different in their current limit threshold. The SP6200 has a current limit of 140mA, while the SP6201 cur-rent limit is 420mA. The SP6201 can provide pulsed load current of 300mA. The LDOs have a two stage amplifier which handles an ex-tremely wide load range (10µA to 300mA) and guarantees stability with a 1µF ceramic load capacitor. The LDO amplifier has excellent gain and thus touts PSRR performance not found in other CMOS LDOs. The amplifier guarantees no overshoot on power up or while enabled through the EN pin. The amplifier also contains an active pull down, so that when the load is removed quickly the output voltage transient is minimal; thus output deviation due to load tran-sient is small and fairly well matched when connecting and disconnecting the load.An accurate 1.250V bandgap reference is bootstrapped to the output in fixed output ver-sions of 2.7V and higher. This increases both the low frequency and high frequency PSRR. The adjustable version also has the bandgap refer-ence bootstrapped to the output, thus the lowest externally programmable output voltage is 2.7V. The 2.5V fixed output version has the bandgap always connected to the Vin pin. Unlike many LDOs, the bandgap reference is not brought out for filtering by the user. This tradeoff was maid to maintain good PSRR at high frequency (PSRR can be degraded in a system due to switching noise coupling into this pin). Also, often leak-ages of the bypass capacitor or other compo-nents cause an error on this high impedance bandgap node. Thus, this tradeoff has been made with "ease of use" in mind.

Protection

Current limit behavior is very well controlled, providing less than 10% variation in the current limit threshold over the entire temperature range for both SP6200 and SP6201. The SP6200 has a current limit of 140mA, while the SP6201 has a current limit of 420mA. Thermal shutdown ac-tivates at 162°C and deactivates at 147°C. Ther-mal shutdown is very repeatable with only a 2 to 3 degree variation from device to device. Ther-mal shutdown changes by only 1 to 2 degrees with Vin change from 4V to 7V.

Enable (Shutdown Not) Input

The LDOs are turned off by pulling the EN pin low and turned on by pulling it high. If it is not necessary to shut down the LDO, the EN (pin 3) should be tied to IN (pin 1) to keep the regulator output on at all time. The enable threshold is 0.9V and does not change more than 100mV over the entire temperature and Vin voltage range. The lot to lot variations in Enable Thresh-old is also within 100mV. Shutdown current is guaranteed to be <1uA without requiring the user to pull enable all the way to 0V. Standard TTL or CMOS levels will transition the device from totally on to totally off.

THEORY OF OPERATION

An accurate Vout good indicator is provided on all the fixed output version devices, pin 4 (RSN),Figure 1. This is an open drain, logic output that can be used to hold a microprocessor or micro-controller in a RESET condition when it's power supplied by Vout is 4% out of nominal regula-tion. A 1% hysteresis is included in the Reset Not function, so that false alarms are not issued as a result of LDO's output noise. The Reset Not function reacts in 10 to 50µs.

Adjustable Output Version

The adjustable version can be programmed to any voltage from 2.7V to 6V for the industrial temperature range; 2.5V to 6V for the commer-cial temperature range. The output can not be programmed below 2.5V due a headroom re-striction. Since the bandgap is bootstrapped to the output, the output voltage must be above the minimum bandgap supply voltage. The bandgap requires 2.7V or greater at -40°C and requires 2.5V or greater at 0°C.

The regulator's output can be adjusted to a specific output voltage by using two external resistors, Figure 2. The resistor's set the output voltage based on the following equation:

V OUT = 1.25 (R2/R1 + 1)

Resistor values are not critical because the ADJ node has a high input impedance, but for best results use resistors of 470k Ω or less. A capaci-tor from ADJ to Vout pin provides improved noise performance as is shown in the following plot.

Noise Performance 10Hz to 100kHz

Adj, Vin = 4.3V, Vout = 3.3V (Cin = Cout = 1uF)

100

200

300

400

1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07

Bypass Cap from Vout to FB (pF)

O u t p u t N o i s e (u V r m s )

Reset Not (VOUT good) Output

Input Capacitor

A small capacitor, 1µF or higher, is required from V IN to GND to create a high frequency bypass for the LDO amplifier. Any ceramic or tantalum capacitor may be used at the input.Capacitor ESR (effective series resistance)should be smaller than 3Ω.

Output Capacitor

An output capacitor is required between V OUT and GND to prevent oscillation. A capacitance as low as 0.22µF can fulfill stability require-ments in most applications. A 1µF capacitor will ensure unconditional stability from no load to full load over the entire input voltage, output voltage and temperature range. Larger capacitor values improve the regulator's transient response.The output capacitor value may be increased without limit. The output capacitor should have an ESR (effective series resistance) below 5Ωand a resonant frequency above 1MHz.No Load Stability

The SP6200/6201 will remain stable and in regulation with no external load (other than the internal voltage driver) unlike many other volt-age regulators. This is especially important in CMOS RAM keep-alive applications.Thermal Considerations

The SP6200 is designed to provide 100mA of continuous current, while the SP6201 will pro-vide 200mA of continuous current. Maximum power dissipation can be calculated based on the output current and the voltage drop across the part. To determine the maximum power dissipa-tion in the package, use the junction-to-ambient thermal resistance of the device and the follow-ing basic equation:

P D =

(T J(max) - T A )θJA T J(max) is the maximum junction temperature of the die and is 125°C. T A is the ambient operating.θJA is the junction-to-ambient thermal resistance for the regulator and is layout dependent.

The actual power dissipation of the regulator circuit can be determined using one simple

P D = (V IN - V OUT)*I OUT + V IN*I GND

≅ (V IN - V OUT) * I OUT Substituting P D(max) for P D and solving for the operating conditions that are critical to the ap-plication will give the maximum operating con-ditions for the regulator circuit. For example, if we are operating the SP6201- 3.0V at room temperature, with a SOT-23-5 package on a 4 layer standard board we can determine the maxi-mum input voltage for a set output current.

P D(max) = (125°C -25°C) = 1.1W

(90°C/W)

To prevent the device from entering thermal shutdown, maximum power dissipation can not be exceeded. Using the output voltage of 3.0V and an output current of 200 mA, the maximum input voltage can be determined. Ground pin current can be taken from the electrical spec’s-

table (I

GND =200uA at I OUT=200uA). The maxi-

mum input voltage is determined as follows: 1.1W = (V IN – 3.0V)*200mA + V IN*0.2mA Solving for V IN, we get:

V IN = (1.1W + 0.6W)

200.2mA

After calculations, we find that the maximum input voltage of a 3.0V application at 200mA of output current in an SOT-23-5 package is 8.4V. Dual-Supply Operation

When used in dual supply systems where the regulator load is returned to a negative supply, the output voltage must be diode clamped to ground.TYPICAL CHARACTERISTICS

Turn on time, Io=1mA, 4Vin

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 1mA

Cin = Cout = 1uF Cer. Cap

V EN

V OUT

0V

2V 4V 0V

1V 2V 3V

Turn on time, Io=100mA, 4Vin

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 100mA

Cin = Cout = 1uF Cer. Cap

V EN

V OUT

0V

2V 4V 0V

1V 2V 3V Turn on time, Io=300mA, 4Vin

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 300mA

Cin = Cout = 1uF Cer. Cap

V EN

V OUT

0V

2V 4V 0V

1V 2V 3V Turn on time, Io=100mA, 7Vin

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 7V Iout = 100mA

Cin = Cout = 1uF Cer. Cap

V EN

V OUT

0V

2V 4V 0V

1V 2V 3V Turn off time, Io=1mA, 4Vin

V EN

V OUT

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout= 1mA

Cin = Cout = 1uF Cer. Cap

0V

2V 2V 0V

1V 4V 3V Turn off time, Io=50mA, 4Vin

V EN

V OUT

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 50mA

Cin = Cout = 1uF Cer. Cap

0V

2V 2V 0V

1V 4V 3V

Turn off time, Io=100mA, 4Vin

V OUT

V EN

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 100mA

Cin = Cout = 1uF Cer. Cap

3V 2V 2V 0V

0V

1V 4V Turn off time, Io=100mA, 7Vin

V EN

V OUT

SP6201 - 3.0Vout fixed Ven is toggled, Vin = 7V Iout = 100mA

Cin = Cout = 1uF Cer. Cap

3V 2V 2V 0V

0V

1V 4V Inrush Current, Io=100mA

SP6201 - 3.0Vout fixed, Vin=4V Ven is toggled, Iout=100mA Cin = Cout = 1uF Cer. Cap

V EN

V OUT

0V

2V 4V 0V

2V 0mA

250mA 500mA 750mA

650mA Inrush Current, Io=100uA

SP6201 - 3.0Vout fixed, Vin=4V Ven is toggled, Iout = 100uA Cin = Cout = 1uF Cer. Cap

I I

V OUT

V EN

0V

2V 4V 2V 0mA

250mA 500mA 0V

650mA

Load Transient Response, 100mA step, 4Vin

I OUT

V OUT

SP6201 - 3.0Vout fixed Vin = 4V, Iout = 100mA Cin = Cout = 1uF Cer. Cap

100uA

0mA

100mA 0mV -40mV

-20mV 20mV 40mV 60mV

80mV Tr = Tf = 100ns

Load Transient Response, 100mA step, 7Vin

I OUT

V OUT

SP6201 - 3.0Vout fixed Vin = 7V , Iout = 100mA Cin = Cout = 1uF Cer. Cap

100uA

0mA

100mA 0mV 20mV -20mV 40mV 60mV

80mV -40mV

Tr = Tf = 100ns

Load Transient Response, 200mA step, 4Vin

I OUT

V OUT

SP6201 - 3.0Vout fixed Vin = 4V , Iout = 200mA Cin = Cout = 1uF Cer. Cap

100uA

0mA

100mA 200mA

0mV -50mV

50mV 100mV 150mV

200mV Tr = Tf = 100ns

Load Transient Response, 300mA step, 4Vin

I OUT

V OUT

SP6201 - 3.0Vout fixed Vin = 4V, Iout = 300mA Cin = Cout = 1uF Cer. Cap

100uA

0mA

200mA 0mV -50mV

50mV 100mV 150mV 200mV Tr = Tf = 100ns

I OUT = 10mA C OUT = 2.2µF

Frequency (HZ)

-20

-40-60

-80

-100

10 100 1k 10k 100k 1M 10M

REF LEVEL /DIV

0.000dB

10.000dB

START

10.000Hz

STOP 10 000 000.000Hz

(d B )

I OUT = 1mA C OUT = 2.2µF

Frequency (HZ)

-20

-40

-60

-80

-100

10 100 1k 10k 100k 1M 10M

Power Supply Rejection Ratio

REF LEVEL /DIV

0.000dB

10.000dB

START

10.000Hz

STOP 10 000 000.000Hz

I OUT = 100mA C OUT = 2.2µF

-20

-40

-60

-80

-100

10 100 1k 10k 100k 1M 10M

REF LEVEL /DIV

0.000dB

10.000dB

START

10.000Hz

STOP 10 000 000.000Hz

I OUT = 100µA C OUT = 1µF V IN = 4V V OUT = 3V

-20

-40

-60

-80

-100

10 100 1k 10k 100k 1M 10M

REF LEVEL /DIV

0.000dB

10.000dB

START

10.000Hz

STOP 10 000 000.000Hz

PACKAGE: 5 PIN SOT-23

VIEW C

- - 1.450 - 0.15Dimensions in (mm)

5 PIN SOT-23JEDEC MO-178(AA) V ariation 0.90 1.15 1.300.30 - 0.500.08 - 0.22 2.90 BSC 2.80 BSC

1.60 BSC

0.30 0.45 0.60

0.60 REF 0º 4º 8ºA A1A2b c D E E1L L1L2Ø 5º 10º 15º

Ø1

MIN NOM MAX 0.25 BSC

e e1 1.90 BSC 0.95 BSC 5 PIN SOT-23

PACKAGE: 8 PIN DFN

T op View

Bottom View

L

A3

K K Side View

T erminal #1 Index Area (D/2 * E/2)

2x3 8 Pin DFN JEDEC mo-229C (VCED-2) Variation

Dimensions in (mm)Symbol

MIN NOM MAX A

A1A3b D D2E2e L

0.80

0.90

1.00

0 0.02 0.050.202.00 BSC 1.50 1.750.30

0.40

0.501.60 1.900.18

0.250.30

0.502x3 8 Pin DFN

E 3.00 BSC

------0.20--

ANALOG EXCELLENCE Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

Corporation

Sales Office 22 Linnell Circle Billerica, MA 01821TEL: (978) 667-8700FAX: (978) 670-9001e-mail: sales@sipex.com Sipex Corporation

Headquarters and

Sales Office

233 South Hillview Drive

Milpitas, CA 95035

TEL: (408) 934-7500

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ORDERING INFORMATION

Part Number Topmark Temperature Range Package Type SP6200EM5-1.5...................E15........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-1.5/TR.............E15........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-1.8...................E18........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-1.8/TR.............E18........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-2.5...................E25........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-2.5/TR.............E25........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-2.7...................E27........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-2.7/TR.............E27........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-2.85................E285.......................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-2.85/TR..........E285.......................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-3.0...................E30........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-3.0/TR.............E30........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-3.3...................E33........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-3.3/TR.............E33........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-3.5...................E35........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-3.5/TR.............E35........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5-5.0...................E50........................-40˚C to +125˚C .........................5 Pin SOT-23SP6200EM5-5.0/TR.............E50........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6200EM5.......................... EADJ ...................... -40˚C to +125˚C ......................... 5 Pin SOT-23SP6200EM5/TR .................... EADJ ...................... -40˚C to +125˚C . (Tape & Reel) 5 Pin SOT-23SP6201EM5-1.5...................F15........................-40˚C to +125˚C ........................ 5 Pin SOT-23SP6201EM5-1.5/TR.............F15........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201EM5-1.8...................F18........................-40˚C to +125˚C ........................ 5 Pin SOT-23SP6201EM5-1.8/TR.............F18........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201ER-1.8.....................ER18.........................-60˚C to +125˚C.......................... 8 Pin DFN SP6201ER-1.8/TR...............ER18.........................-60˚C to +125˚C....(Tape & Reel) 8 Pin DFN SP6201EM5-2.5...................F25........................-40˚C to +125˚C .........................5 Pin SOT-23SP6201EM5-2.5/TR.............F25........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201EM5-2.7...................F27........................-40˚C to +125˚C .........................5 Pin SOT-23SP6201EM5-2.7/TR.............F27........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201EM5-2.85................F285.......................-40˚C to +125˚C .........................5 Pin SOT-23SP6201EM5-2.85/TR..........F285.......................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201EM5-3.0...................F30........................-40˚C to +125˚C .........................5 Pin SOT-23SP6201EM5-3.0/TR.............F30........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201EM5-3.3...................F33........................-40˚C to +125˚C .........................5 Pin SOT-23SP6201EM5-3.3/TR.............F33........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201ER-3.3......................ER33........................-60˚C to +125˚C.......................... 8 Pin DFN SP6201ER-3.3/TR................ER33........................-60˚C to +125˚C....(Tape & Reel) 8 Pin DFN SP6201EM5-3.5...................F35........................-40˚C to +125˚C .........................5 Pin SOT-23SP6201EM5-3.5/TR.............F35........................-40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201EM5- 5.0..................F50........................-40˚C to +125˚C ........................ 5 Pin SOT-23SP6201EM5-5.0/TR ............... F50........................ -40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23SP6201EM5.......................... FADJ ...................... -40˚C to +125˚C ......................... 5 Pin SOT-23SP6201EM5/TR .................. FADJ ...................... -40˚C to +125˚C .(Tape & Reel) 5 Pin SOT-23