om9369

11/21/03

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FULL-FEATURED POWER MODULE OM9369SP FOR HIGH VOLTAGE DIRECT DRIVE OF 3-PHASE BRUSHLESS DC MOTOR F-43 / MP3-43L Packages

Features:

n Fully Integrated 3-Phase Brushless DC Motor

Control Subsystem includes Power Stage, Non-Isolated Driver Stage and Controller Stage n Rugged IGBT Power Output Stage with Soft Recovery Diode

n 25A Average Phase Current with 300V Maximum Bus Voltage

n Internal Precision Current Sense Resistor (6W Max. Dissipation)

n Speed and Direction Control of Motor n Brake Input for Dynamic Braking of Motor n Overvoltage/Coast Input for Shutdown of All Power Switches

n Soft Start for Safe Motor Starting

n Unique Hermetic or Plastic Ring Frame Power Flatpacks

Hermetic (3.10” X 2.10” X 0.385”)

Plastic Ring Frame (4.13” X 2.00” X 0.49”)

Applications:

n Fans and Pumps n Hoists

n Actuator Systems

The OM9369 is one of a series of versatile, integrated three-phase brushless DC motor controller/driver subsystems housed in a 43 pin power flatpack. The OM9369 is best used as a two quadrant speed controller for controlling/driving fans, pumps, and motors in applications which require small size.Typical size brushless DC motors that the OM9369can effectively control range from fractional HP up to several HP . The OM9369 is ideal for use on DC distribution buses up to and including 270Vdc. Many integral control features provide the user much flexibility in adapting the OM9369 to specific system requirements.

MP3-43L

Description:

F-43The small size of the complete subsystem is ideal for aerospace, military , and high-end industrial applications.Two package types provide a broad range of cost and screening options to fit any application.

25A Push-Pull

3-Phase Brushless DC Motor Controller / Driver Module in a Power Flatpack

OM9369SF

OM9369P D - 95806

OM9369

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* T CASE = 25°C

* * T CASE = 25°C, Maximum pulse width = 10 mS

Note 1: Logic Inputs: Direction, Hall Inputs (H1--- H3) Overvoltage - Coast, Speed, and Quad Select.

Note 2: The internal 5m Ω current sense resistor is limited to 6 Wdc power dissipation. Other values are avaliable. Please contact International Rectifier for more information.

Recommended Operating Conditions ( Tcase = 25°C )

OM9369 Electrical Characteristics

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1. All parameters specified for Ta = 25°C, Vcc = 15Vdc, Rosc= 75K Ω (to Vref), Cosc = 1800pF , and all Phase Outputs unloaded (Ta-Tj). All negative currents shown are sourced by (flow from) the pin under test.

2. Either ISH or ISL may be driven over the range shown.

3. Bold parameters tested over temperature range.

Specification Notes:

Electrical Characteristics - Continued

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OM9369

The OM9369 3-phase brushless DC motor controller/driver is designed to drive fractional to integral horsepower motors. To ensure proper operation, it is necessary to ensure that the high-side bootstrap capcitors are charged during initial start-up. However,the method(s) used to ensure this may be dependant upon the application. For example, some applications may only require that OV_COAST (pin 17) be connected to ground, either via a hardwire connection or via a switch (Enable/Disable), before applying Vcc.When Vcc is applied, the controller/driver is forced into brake mode for approximately 200µs (all high-side drivers are disabled and all low-side drivers are enabled).

APPLICATIONS

Start-Up Conditions

Fig 1: Start-Up Circuit

This may not be adequate for other applications;while maintaining a constant speed command, (above zero), RC_BRAKE (pin 16) may have to be momentarily connected to ground via a switch, either manually or electronically (ref. Figure 1). Note that with the component values shown in Figure 1, RC_BRAKE is pulled for low for approximately 300ms after

applying Vcc at pin 1.

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Modes of Operation

Figures 2 and 3, shown on the following pages,provides schematic representations of typical voltage-mode and current -mode applications for the OM9369controller/driver.

Figure 2 represents the implemenation of a typical voltage-mode controller for velocity control. A voltage or speed command is applied to the noninverting input of the error amplifier which is configured as voltage follower. The ouput of the error amplifier is compared to a pulse width modulated ramp, and since motor speed is nearly proportional to the average phase output voltage, the average speed is controlled via duty cycle control. If a speed feedback loop is required, the tachometer output can be connected to the inverting input of the error amplifier via a loop compensation network.

Fig 2: Implementation of a Voltage -Mode Controller

Figure 2 also shows the implementation of the cycle-by-cycle current limit/overcurrent protection feature of the OM9369. The load current is monitored via the controller’s internal sense resistor. The current sense signal is filtered and fed into the current sense amplifier where the absolute value of ISH-ISL is multiplied by two and biased up by 2.5V.The output of the current sensor amplifier is

compared to a fixed reference, thus providing cycle-by-cycle current limiting and/or overcurrent protection as necessary. The typical peak current threshold (ISL-ISH) is 0.2V; the typical over current threshold (ISH-ISL) is 0.3V .

C_FILT

232

232

4700pF .1uF

3.24k

1.50k

1k

.1uF

C_BUS +10uF

+

.1uF 10k Vcc 1VREF 5OSCILLATOR 10PWM_IN

9EA1_OUT 8EA1+4EA1-2SOFT_START 18I_SENSE 11ISH 12ISL

13QUAD_SEL 14DIRECTION 24SPEED_IN 23EA2_OUT 7EA2+3EA2-6BRAKE

16TACH_OUT 15GROUND

19V_MOTOR

43PHASE_A_OUT

42

PHASE_A_OUT

41

SOURCE_A 40SOURCE_A 39V_MOTOR

38

PHASE_B_OUT

37

PHASE_B_OUT

36

SOURCE_B 35SOURCE_B 34V_MOTOR

33

PHASE_C_OUT

32

PHASE_C_OUT

31

30SOURCE_C

29

MOTOR_RETURN

28

MOTOR_RETURN

27

H1_HALL_INPUT 22H2_HALL_INPUT 21H3_HALL_INPUT 20CSH 25CSL

26

OV_COAST 17H3

H2H1H3H2H1

V_MOTOR

COMMAND

+15V

HALL SENSORS

FROM MOTOR HALL SENSORS

MOTOR

SOURCE_C

OM9369 Figure 3 represents the implementation of a typical

current-mode controller for torque control. The load

current is monitored via the controller’s internal sense

resistor. The current sense signal is filtered and fed

into the current sense amplifier where the absolute

value of ISH-ISL is multiplied by two and biased up by

2.5V. Besides the implementation of the cycle-by-

cycle current limit/overcurrent protection feature of the

OM9369 discussed in the preceding paragraph, the

output of the current sense amplifier is fed into the

error amplifier which is configured as a differential

amplifier. An error signal representing the difference

between the current command input and the value

of the amplified current sense signal is produced.

Then it is compared to a pulse width modulated

ramp and since torque is nearly proportional to the

average phase output current, the torque is controlled

via duty cycle control.

Fig 3: Implementation of a Current-Mode Controller

C_BUS+C_FILT

232

232

4700pF

.1uF

.1uF

10uF+

.26uF

43k

1800pF

2k

3.24k

3.24k

1k

35.6k

10k

.1uF

Vcc

1

VREF

5

OSCILLATOR

10

PWM_IN

9

EA1_OUT

8

EA1+

4

EA1-

2

SOFT_START

18

I_SENSE

11

ISH

12

ISL

13

QUAD_SEL

14

DIRECTION

24

SPEED_IN

23

EA2_OUT

7

EA2+

3

EA2-

6

BRAKE

16

TACH_OUT

15

GROUND

19

V_MOTOR

43

PHASE_A_OUT

42

PHASE_A_OUT

41

SOURCE_A

40

SOURCE_A

39

V_MOTOR

38

PHASE_B_OUT

37

PHASE_B_OUT

36

SOURCE_B

35

SOURCE_B

34

V_MOTOR

33

PHASE_C_OUT

32

PHASE_C_OUT

31

30

SOURCE_C

29

MOTOR_RETURN

28

MOTOR_RETURN

27

H1_HALL_INPUT

22

H2_HALL_INPUT

21

H3_HALL_INPUT

20

CSH

25

CSL

26

OV_COAST

17

H3

H2

H1 H3

H2

H1

V_MOTOR +15V

CURRENT_COMMAND

HALL SENSORS

FROM MOTOR HALL SENSORS

MOTOR OFFSET

SOURCE_C

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Simplified Block Diagram

OM9369 Pin Descriptions / Functionality

VCC (Pin 1) -- The Vcc Supply input provides bias

voltage to all of the internal control electronics

within the OM9369, and should be connected to a

nominal +15Vdc power source. High frequency bypass

capacitors (10uF polarized in parallel with 0.1uF ceramic

are recommended) should be connected as close as

possible to pin 1 and Ground (pin 19).

ERROR AMPLIFIER (EA1- Input, Pin 2; EA1+

Input, Pin 4; EA1 Output, Pin 8) -- The Error

Amplifier is an uncommitted LM158-type operational

amplifier, providing the user with many external

control loop compensation options. This amplifier

is compensated for unity gain stability, so it can be

used as a unity gain input buffer to the internal

PWM comparator when pin 2 is connected to pin 8.

The output of the Error Amplifier is internally connected

to the PWM comparator's "-" input, simplifing external

layout connections.

+5V REFERENCE OUTPUT (Pin 5) -- This output

provides a temperature-compensated, regulated

voltage reference for critical external loads. It is

recommended that this pin be used to power the

external Hall-effect motor position sensors. By design,

the +5V reference must be in regulation before the

remainder of the control circuitry is activated. This

feature allows the Hall-effect sensors to become

powered and enabled before any Phase Output is

enabled in the OM9369 preventing damage at

turn-on. High-frequency bypass capacitors (10uF

polarized in parallel with 0.1uF ceramic are

recommended should be connected as close as

possible to pin 5 and Ground (pin 19).

SPARE AMPLIFIER (EA2- Input, Pin 6; EA2+

Input, Pin 3; EA2 Output, Pin 7) -- The Spare

Amplifier is an uncommitted LM158-type operational

amplifier, and in addition to the internal error

amplifier, provides the user with additional external

control loop compensation options. This amplifier is

also compensated for unity gain stability and it can

be used as a unity gain input buffer when pin 6 is

connected to pin 7. If the Spare Amplifier is unused,

pin 3 should be connected to Ground, and pin 6

should be connected to pin 7.

OSCILLATOR TIMING INPUT (Pin 10) -- The Oscillator

Timing Input sets a fixed PWM chopping frequency

by means of an internal resistor (Rosc), whose

value is set to 75kΩ, connected from pin 10 to the

+5V Reference Output, and an internal capacitor

(Cosc), whose value is 1800pF, connected from pin

10 to Ground. In custom applications, the recommended

range of values for Rosc is 10kΩ to 100kΩ, and for

Cosc is 0.001uF to 0.01uF, and the maximum operating

frequency should be kept below 20kHz. The approximate

oscillator frequency is:

The voltage waveform on pin 10 is a ramp whose

magnitude is approximately 1.2Vp-p, centered at

approximately 1.6Vdc. In addition to the voltage-

mode PWM control, pin 10 may be used for slope

compensation in current-mode control applications.

ISENSE (Pin 11) -- This pin is connected to the

output of the internal current-sense amplifier. It

drives a peak-current (cycle-by-cycle) comparator

which controls Phase Output chopping, and a fail-

safe current comparator which, in the event of an

output overcurrent condition, activates the soft-start

feature and disables the Phase Outputs until the

overcurrent condition is removed. The magnitude of

the voltage appearing at pin 11 is dependent upon

the voltages present at the current-sense amplifier

inputs, ISH and ISL:

V(Isense) = 2.5V + [2 x ABS (ISH - ISL)] [ V ]

CURRENT SENSE INPUTS (ISH, Pin 12; ISL, pin 13)

PWM INPUT (Pin 9) -- This pin is connected to the

"+" input of the internal PWM comparator. The PWM

output clears the internal PWM latch, which in turn

commands the Phase Outputs to chop. For voltage-

mode control systems, pin 9 may be connected to

the Oscillator Timing Input, pin 10.

These inputs to the current-sense amplifier are

interchangeable and they can be used as differential

inputs. The differential voltage applied between pins

12 and 13 should be kept below +/-0.5Vdc to avoid

saturaion.

f

o

=

( Rosc x Cosc )

2

[ Hz ]

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TACHOMETER OUTPUT (Pin 15) -- This output provides a fixed width 5V pulse when any Hall-effect Input (1, 2 or 3) changes state. The pulse width of the Tachometer Output is set internally in the OM9369 to 113µs (nominal). The average value of the output voltage on pin 15 is directly proportional to the motor's speed, so this output may be used (with an external averaging filter) as a true tachometer output, and fed back to the Speed Input (pin 23) to sense the actual motor speed.

Note : Whenever pin 15 is high, the internal Hall-effect position latches are inhibited (i.e. "latched"), to reject noise during the chopping portion of the commutation cycle, and this makes additional

commutations impossible. This means that in order to prevent false commutation at a speed less than the desired maximum speed, the highest speed as observed at the Tachometer Output should be set above the expected maximum value.

BRAKE / TACH TIMING INPUT (Pin 16) -- The Brake/Tach Timing Input is a dual-purpose input.Internal to the OM9369 are timing components tied from pin 16 to Ground (a 51k Ω resistor and a 3300pF capacitor). These components set the minimum pulse width of the T achometer Output to 113µs, and this time may be adjusted using external components,according to the equation:

T(tach) = 0.67 x (C t + 3300pf) x (Rt x 51k Ω )

(µs)

The recommended range of external resistance (to Ground) is 15k Ω to ∞, and the range of external capacitance (to Ground) is 0pF to 0.01uF . With each Tachometer Output pulse, the capacitor tied to pin 16 is discharged from approximately 3.33V to

QUAD SELECT INPUT (Pin 14) -- This input is used to set the OM9369 in a half control or full control chopping regime. When driven with a logic low level,the OM9369 is in the half control mode, whereby only the three lower (pull-down) power switches associated with the Phase Outputs are allowed to chop. Alternately,when driven with a logic high level, the OM9369 is in the full control mode, where all six power switches (pull-up and pull-down) associated with the Phase Outputs are chopped by the PWM. During motor braking,changing the logic state of the Quad Select Input has no effect on the operation of the OM9369.approximately 1.67V by an internal timing resistor.The Brake / T ach Timing Input has another function.If this pin is pulled below the brake threshold voltage, the OM9369 will enter the brake mode. The brake mode is defined as the disabling of all three high-side (pull-up) drivers associated with the Phase Outputs, and the enabling of all three low-side (pull-down) drivers.

OVERVOLTAGE / COAST INPUT (Pin 17) -- This input may be used as a shutdown or an enable/disable input to the OM9369. Also, since the switching inhibit threshold is so tightly defined, this input can be directly interfaced with a resistive divider which senses the voltage of the motor supply, Vm, for overvoltage conditions. A high level (greater than the inhibit threshold) on pin 17 causes the coast condition to occur, whereby all Phase Outputs revert to a Hi-Z state and any motor current which flowed prior to the Overvoltage/ Coast command is commutated via the power "catch" rectifiers associated with each Phase Output.

SOFT -START INPUT (Pin 18) -- The Soft-Start input is internally connected to a 10µA (nominal) current source, the collector of an NPN clamp/discharge transistor, and a voltage comparator whose soft-start/restart threshold is 0.2Vdc (nominal). An external capacitor is connected from this pin to Ground (pin 19). Whenever the Vcc supply input drops below the turn-on threshold, approximately 9Vdc, or the sensed current exceeds the over-current threshold,

approximately 0.3V at the current sense amplifier,the soft-start latch is set. This drives the NPN clamp transistor which discharges the external soft-start capacitor. When the capacitor voltage drops below the soft-start/restart threshold and a fault condition does not exist, the soft-start latch is cleared; the soft-start capacitor charges via the internal current source.

In addition to discharging the soft-start capacitor, the clamp transistor also clamps the output of the error amplifier internal to the controller IC, not allowing the voltage at the output of the error amplifier to exceed the voltage at pin 18, regardless of the inputs to the amplifier. This action provides for an orderly motor start-up either at start-up or when recovering from a fault condition.

Rt + 51k Ω

OM9369 GROUND (Pin 19) - The voltages that control the

OM9369 are referenced with respect to this pin. All

bypass capacitors, timing resistors and capacitors,

loop compensation components, and the Hall-effect

filter capacitors must be referenced as close as

possible to pin 19 for proper circuit operation.

Additionally, pin 19 must be connected as close as

physically possible to the Motor Return, pins 27 and

28.

HALL-EFFECT INPUTS (H1, Pin 22; H2, Pin 21; H3,

Pin 20) - Each input has an internal pull-up resistor

to the +5V Reference. Each input also has an

internal 180pF noise filter capacitor to Ground. In

order to minimize the noise which may be coupled

from the motor commutation action to these inputs, it

is strongly recommended that additional external

filter capacitors, whose value is in the range of

2200pF, be connected from each Hall-Effect Input

pin to Ground. Whatever capacitor value is used, the

rise/fall times of each input must be guaranteed to

be less than 20us for proper tachometer action to

occur. Motors with 60 degree position sensing may

be used if one or two of the Hall-effect sensor

signals is inverted prior to connection to the Hall-

Effect Inputs.

SPEED INPUT (Pin 23) - This pin is connected to the

“+” input of a voltage comparator, whose threshold

is 0.25Vdc. As long as the Speed Input is less than

0.25V, the direction latch is transparent. When the

Speed Input is greater than 0.25V, then the direction

latch inhibits all changes in direction. It is recomme-

ded, especially while operating in the half control

mode, that the Tachometer Output is connected to

the Speed Input via a low-pass filter, such that the

direction latch is transparent only when the motor

is spinning very slowly. In this case, the motor has

too little stored energy to damage the power devices

during direction reversal.

DIRECTION INPUT (Pin 24) - This input is used to

select the motor direction. This input has an internal

protection feature: the logic-level present on the

Direction Input is first loaded into a direction latch,

then shifted through a two-bit shift register before

interfacing with the internal output phase driver

logic decoder. Also, protection circuitry detects

when the input and the output of the direction latch

or the 2-bit shift register are different, and inhibits

the Phase Outputs (i.e. Hi-Z) during those times. This

feature may be used to allow the motor to coast to a

safe speed before a direction reversal takes place.

Power stage cross-conduction(current"shoot-through”

from Vmotor to Ground through simultaneously enabled

pull-up and pull-down drivers) is prevented by the shift

register as it is clocked by the PWM oscillator, so that

a fixed delay of between one and two PWM oscillator

clock cycles occurs. This delay or "dead-time"

guarantees that power-stage cross-conduction will not

occur.

CURRENT SENSE OUTPUTS (CSH, Pin 25; CSL,

Pin 26) - The Current Sense Outputs produce a

differential voltage equal to the motor current times

the sense resistance value (5mΩ nominal). There is

an internal 1000pF filter capacitor across pins 25

and 26, and two 100Ω series resistors, one between

each pin and each end of the current sense resistor.

T o configure the current sense amplifier for cycle-

by-cycle current limiting and/or overcurrent protection,

connect pin 25 to pin 12 (ISH) and pin 26 to pin 13

(ISL).

MOTOR RETURN (Pins 27 and 28) - These pins are

connected to the most negative terminal of the

motor supply (Vm-). This connection is electrically

isolated from the logic ground internal to the OM9369

package to minimize, if not eliminate, noise on the

logic ground. The connection to the logic ground is

made by the user external to the package (refer to

Ground (pin 19)). In order to minimize packaing

losses and parasitic effects, it is essential that both

of these pins be firmly connected to the motor supply

Ground, with as short a connection as physically

possible.

SOURCE (Pins 29, 30, 34, 35, 39 and 40) - The

source pins form the low-side connection of the pull-

down switches associated with each Phase Output.

Because of the switching current capability of the

OM9369, all 6 pins should be externally connected

together with a low impedance bus to minimize

losses and voltage differentials. Also, due to layout

design considerations, pin 29 and pin 30 are internally

connected to the "top" of the internal current-sense

resistor.

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PHASE OUTPUTS (Phase A, Pins 41 and 42; Phase B, Pins 36 and 37; Phase C, Pins 31 and 32) These outputs are connected to either Vmotor via the pull-up driver or Source via the pull-down driver, depending upon the Hall-Effect and Direction Inputs (see Commutation T ruth T able). The two pins associated with each Phase Output must be connected to one of the three phases of the motor driven by the OM9369. V MOTOR (Pins 33, 38, and 43) - These pins are connected to the most positive terminal of the motor supply (Vm+). For proper operation, all three pins must be connected together externally with a low impedance power bus. The V motor power bus should be bypassed with an adequately voltage-rated ceramic capacitor, 0.1µF (typical), and a low-ESR electrolytic capacitor, whose capacitance can be selected by the following: 10µF-per-Ampere of average motor current from V motor to Motor Return.

Note: All connections, including the power bus capacitor connections, must be made as close as possible to the V motor and Motor Return pins to minimize parasitic effects.

Pin Designation

OM9369 Commutation Truth Table

T able 1 shows the Phase Output state versus the state

of the Hall-Effect and Direction Inputs. Please note

that the OM9369 Hall-Effect Inputs are Grey-encoded;

that is, only one input is allowed to change from one

input state to another at a time.

The commutation coding shown reflects Hall-Effect

sensors that are spaced at 120° mechanical

increments. Also, internal protection logic disables

all three Phase Outputs when the Hall-Effect Inputs

are set to an illegal condition (i.e. all logic low or all

logic high).

The OM9369 is offered in F-43, a hermetic flatpack

package as well as in MP3-43L, a plastic ring frame,

low profile flatpack package.

The hermetic version is offered in two standard

screening levels: a full military temperature range of

-55°C to +125°C with limited screening and with

Package and Screening Options

MIL-STD-883 screening. The plastic ring frame ver-

sion is offered in an industrial temperature range of

-40°C to +85°C with limited screening.

The screening levels for the SFB, SFP and SPP

versions are listed in the table below. All tests and

inspections are in accordance with those listed in

MIL-STD-883.

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IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

IR LEOMINSTER: 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776

Visit us at www.irf.com for sales contact information .

Data and specifications subject to change without notice. 11/03

Mechanical Outline - F-43 ( OM9369SF )

a Pin 1

Pin 43

Pin 26