2012 碳化硅MOSFET的可靠性问题：高温环境技术

Liangchun C.Yu,Greg T.Dunne,Kevin S.Matocha,Member,IEEE,Kin P.Cheung,

John S.Suehle,and Kuang Sheng,Senior Member,IEEE

(Invited Paper)

Abstract—The wide-bandgap nature of silicon carbide(SiC) makes it an excellent candidate for applications where high temperature is required.The metal–oxide–semiconductor(MOS)-controlled power devices are the most favorable structure;how-ever,it is widely believed that silicon oxide on SiC is physically limited,particularly at high temperatures.Therefore,exper-imental measurements of long-term reliability of oxide at high temperatures are necessary.In this paper,time-dependent dielectric-breakdown measurements are performed on state-of-the-art4H-SiC MOS capacitors and double-implanted MOS field-effect transistors(DMOSFET)with stress temperatures between225◦C and375◦C and stress electricfields be-tween6and10MV/cm.Thefield-acceleration factor is around 1.5dec/(MV/cm)for all of the temperatures.The thermal acti-vation energy is found to be∼0.9eV,independent of the electric field.The area dependence of Weibull slope is discussed and shown to be a possible indication that the oxide quality has not reached the intrinsic regime and further oxide-reliability improvements are possible.Since our reliability data contradict the widely ac-cepted belief that silicon oxide on SiC is fundamentally limited by its smaller conduction-band offset compared with Si,a detailed discussion is provided to examine the arguments of the early predictions.

Index Terms—Activation energy,double-implanted metal-oxide-semiconductor(MOS)field-effect transistor(MOSFET) (DMOSFET),high temperature,MOS reliability,silicon carbide (SiC),time-dependent dielectric breakdown(TDDB),Weibull slope.

Manuscript received January23,2010;revised May8,2010and July29, 2010;accepted August25,2010.Date of publication September20,2010;date of current version January26,2011.This work was supported by the Office of Microelectronics Programs(OMP)at the National Institute of Standards and Technology.

L.C.Yu was with the Rutgers University,Piscataway,NJ08854USA.She is now with General Electric Global Research,Niskayuna,NY12309USA and also with National Institute of Standards and Technology,Gaithersburg,MD 209USA(e-mail:liangchun..yu@nist.gov).

G.T.Dunne and K.S.Matocha are with the General Electric Global Research,Niskayuna,NY12309USA(e-mail:dunne@research.ge.com; matocha@research.ge.com).

K.P.Cheung and J.S.Suehle are with the National Institute of Standards and Technology,Gaithersburg,MD209USA(e-mail:kin.cheung@nist.gov; john.suehle@nist.gov).

K.Sheng was with the Department of Electrical and Computer Engineering, Rutgers University,NJ08854USA.He is now with Zhejiang University, Zhejiang,China(e-mail:shengk@zju.edu.cn).

Color versions of one or more of thefigures in this paper are available online at http://ieeexplore.ieee.org.

Digital Object Identifier10.1109/TDMR.2010.2077295

I.I NTRODUCTION

H ARSH environments,mainly,high temperature,are

expected in a variety of measurement and control ap-plications,such as automotive,aerospace,energy production, and other industrial systems.Silicon-based electronics are prob-lematic when ambient temperature exceeds200◦C due to high internal junction temperature and large leakage currents. The wide-bandgap nature of silicon carbide(SiC)produces a dramatic reduction in the intrinsic carrier density(19orders of magnitude)and allows for more stable high-temperature electronics.In addition to outstanding electronic properties, SiC’s excellent mechanical and thermal stability as well as chemical inertness and radiation hardness are well suited to gas sensing and UV detection in hostile environments[1]–[4]. Among all power-device structures,the metal–oxide–semiconductor(MOS)-controlled devices are favorable due to their high input impedance and low switching losses,which make power electronic circuits more controllable with higher efficiency.However,studies of SiC MOSfield-effect transistor (MOSFET)reliability raised significant concerns on the long-term operation of SiC MOS-based devices,particularly at high temperatures.Lelis et al.[5]demonstrated that the threshold voltage is not stable due to electron tunneling into and out of the oxide traps.Gurfinkel et al.[6]showed that the conventional dc measurement technique underestimated the threshold-voltage instability as fast transient trapping and detrapping events can-not be captured with a slow sweep rate.They also found that postoxidation annealing in NO dramatically reduces instability. Yu et al.[7]reported evidence of channel hot carrier in SiC MOSFET operated at moderate drain bias.

The most important reliability concern is gate-oxide reliabil-ity.Early experimental results of insulators on SiC suggested that SiO2on SiC was not reliable at high temperatures.Lipkin and Palmour[8]investigated several dielectric materials as gate insulator on6H-SiC.All of them showed lifetimes below 1000s at6MV/cm and350◦C.Maranowski and Cooper[9] performed time-dependent dielectric breakdown(TDDB)mea-surements of thermal oxides on6H-SiC.The lifetime distri-butions showed a large extrinsic population,and the mean-time-to-failure(MTTF)extracted from the intrinsic fail-ures suggested that acceptable reliability can only be main-tained if the electricfield is kept below5MV/cm,and the temperature is kept below150◦C.This precludes most of the high-temperature applications where SiC is expected to excel. Singh and Hefner[10]argued that if Fowler–Nordheim(FN)

1530-4388/$26.00©2010IEEEtunneling is assumed,the oxide reliability on SiC is funda-mentally limited by its smaller conduction-band offset(ΦB) compared with Si(2.7versus3.1eV of Si).Agarwal et al.[11] studied the temperature dependence of FN tunneling current in6H-and4H-SiC capacitors and extracted effective barrier height(Φeff)from the FN plots to be2.43eV at25◦C that is reduced significantly to1.76eV at325◦C.With a temperature-dependentflatband voltage correction,Waters and Van Zeghbroeck[12]reported even smallerΦeffof1.92eV at room temperature and around1.1eV at300◦C.Serious concerns have been raised about the reliability of SiC power MOS devices operating at elevated temperatures.Long-term TDDB measurements at high temperatures are required to truly understand the reliability of silicon oxide grown on SiC. Recently,more TDDB measurements of oxide reliability on SiC showed great improvements.Matocha and Beaupre[13] reported an MTTF of2300h at6MV/cm and250◦C on MOS capacitors thermally grown with N2O and NO annealing. Yu et al.[14]reported t63%of215h measured at6.4MV/cm and375◦C.Using TDDB with constant current stress, Fujihira et al.[15]found that charge to breakdown(Q BD) increased from0.1to10C/cm2by employing N2O annealing. Ongoing research is being conducted to further improve oxide reliability.Suzuki et al.investigated the oxide reliability on carbon-face4H-SiC(000-1)substrate with N2O nitridation[16] and dry oxidation plus various pyrogenic reoxidation annealing conditions[17].Fujihira et al.compared the reliability of ther-mal oxide and chemical-vapor-deposited oxide with constant-current-stress TDDB[18].Extrinsic failure is also under investigation.Senzaki et al.correlated the oxide reliability with metal-impurity concentration in the wafer[19]and basal plane dislocations in the epitaxial layer[20],while Matocha et al.

[21]showed contradictory observations that no correlation was found between oxide breakdown pit and the dislocations in the epitaxial layer.Studies of oxide reliability of SiC double-implanted MOSFET(DMOSFET)showed promising results as well.Krishnaswami et al.[22]performed TDDB measurements on2-kV4H-SiC DMOSFETs at175◦C and extrapolated the MTTF to3MV/cm to be longer than100years.The lifetime of the DMOSFETs was found about two orders of magnitude smaller than that of NMOS capacitor.Matocha et al.[21]also observed lower lifetime on DMOSFETs.

In most of the gate-oxide-reliability measurements,due to constraints on the total measurement time,high electricfields are used to accelerate oxide breakdown,and lifetimes at lower electricfields(normal operating conditions)are extrapolated using the high-field data.Therefore,thefield-acceleration model and thefield-acceleration factor employed in the lifetime prediction are of crucial importance.The recently observed change of thefield-acceleration factor might indicate a change of breakdown mechanisms at around9MV/cm for4H-SiC MOS devices with an oxide thickness of∼50nm[21].A natural question would be:“Is there any mechanism change at lower electricfields?”The only way to answer this question is to perform long-term reliability tests at lower electricfields.

In this paper,TDDB measurements are performed on4H-SiC MOS capacitors and DMOSFETs with constant-voltage stress at various temperatures and electricfields.Long-term stress experiments over seven months in duration have been done at 6MV/cm and300◦C.The results indicate that high-field data can be extrapolated to lowerfields with no change in the

field-Fig.1.Lifetimes are predicted from the measured t63%using the E model [24].Projection of lifetime is based on data measured below9MV/cm.The field-acceleration factor is independent of temperature.The error bars indicate the95%confidence intervals.

acceleration factor.Weibull slopes(β)with95%confidence intervals are extracted from the failure distributions and used as an indicator of oxide quality.A more accurate method to extractβusing area scaling is also presented.Temperature dependence and thermal activation energy are also reported. Since our reliability data contradict the widely accepted belief that silicon oxide on SiC is fundamentally limited by its smaller conduction-band offset compared with Si,a detailed discussion is provided to examine the arguments of the early predictions.

II.E XPERIMENTAL S ETUP

The4H-SiC MOS capacitors of various gate areas were

fabricated on4H-SiC Si-face4◦off-axis lightly doped n-type

epilayers(n≈1×1016cm−3).A chemical-vapor-deposited field oxide was deposited and patterned to form the active area

of the capacitors.Next,a47-nm silicon oxide was thermally

grown in N2O at1250◦C and NO at1150◦C,followed by

gate-electrode formation and patterning.

The small-area high-voltage SiC power MOSFETs were fabricated using an implanted DMOS process on4H-SiC Si-face4◦off-axis epiwafers.The gate-oxidation procedure was the same as that used for the MOS capacitors described previously.The power MOSFETs were completed by forming ohmic contacts,including contact annealing at1050◦C for3 min,andfinal metal deposition and patterning.The die area of these small-area MOSFETs is1.1×1.1mm2,providing an active area of5.4×10−3cm2.

Constant-voltage-stress TDDB at four temperatures(375◦C,

300◦C,275◦C,and225◦C)and electricfields between6and

10MV/cm were investigated.For each of the stress conditions,

20or more devices were tested.The times to failure were

plotted with Weibull statistics,and the characteristic lifetime

(t63%,time when63%of the devices have failed)and Weibull

slope(β,an indicator of variations within the sample set)were

extracted with95%confidence intervals,calculated using the

maximum likelihood estimation.

III.R ESULTS AND D ISCUSSIONS

A.Field Acceleration and Lifetime Prediction

Capacitors of size200μm×200μm were stressed at electric fields between6and10MV/cm and temperatures between

Fig.2.Weibull distributions of device failure measured at T=275◦C and various electricfields on200μm×200μm capacitors.Obvious extrinsic failures have been removed from the distributions.

225◦C and375◦C.The characteristic lifetimes(t63%)are shown in Fig.1with95%confidence intervals indicated by the error bars.Each of the data points is extracted from the lifetime distribution of20devices measured by constant-voltage-stress TDDB.Fig.2shows the Weibull distributions at275◦C with obvious extrinsic failures removed.The Weibull probability distribution is employed in the lifetime projection because, although the Weibull and lognormal distributionsfit data of limited sample number almost equally well,the Weibull sta-tistics describes the dielectric breakdown of large sample sizes better than the lognormal distribution[23].As for thefield-acceleration model,there has been a continuing debate over the past three decades in the Si community on the validity of the E model[24]versus the1/E model[25].It is still not clear which one is correct.However,the E model is utilized in this paper to project the lifetime to lower electricfields where the devices operate because it is more pessimistic compared with the1/E model projection,and some experimental data for relatively thick oxide are betterfitted by the E model[26],[27]. In Fig.1,thefield-acceleration factor changes around 9MV/cm,which is consistent with what Matocha et al. reported[21].The physics behind this change offield-acceleration factor is still not clear.One possible explanation is impact ionization,as discussed by Schwalke et al.[28].Elec-trons injected into the oxide by FN tunneling are subsequently heated by the high electricfield.The electrons in the high-energy tail of the distribution have enough energy to collide with the lattice and generate electron–hole pairs.Each of these impact ionizations leaves behind a slowly moving hole.The local potential in the oxide is distorted by the holes building up,which enhances the electricfield and,hence,the tunneling current.At the same oxide electricfield,electrons in the thicker oxide have a higher probability of gaining sufficient energy for impact ionization.Therefore,reliability studies on devices with various oxide thicknesses may help to further understand this issue.The change offield-acceleration factor could also be caused by a certain type of extrinsic defect in the oxide,which has a different electric-field dependence from the intrinsic-field dependence.

Regardless of the mechanism behind the change,lifetimes measured below8.5MV/cm all follow afield-acceleration

TABLE I

P ROJECTED M AXIMUM O PERATING E LECTRIC F

IELD

Fig.3.Weibull distributions measured on capacitors with various sizes at E=8.09MV/cm and T=275◦C.Devices with larger area exhibit longer extrinsic tails.

factor of1.5dec/(MV/cm)at various temperatures,including one set of devices that lasted more than half a year with stress condition of6MV/cm and300◦C.The projected maximum operating electricfield corresponding to lifetimes of10and 100years are summarized in Table I.Compared with the experimental data reported ten years ago[8],[9],the reliability of SiO2on SiC has been significantly improved by several orders of magnitude.

B.Weibull Slope and Area Scaling

Are these results indicative of intrinsic breakdown?Is there still room for further improvement of oxide reliability on SiC? To answer these questions,the Weibull distribution of the failures should be examined more closely.

The expression for Weibull distribution is given by

F(T BD)=1−exp

−

T BD

t63%

β

(1)

where F is the cumulative failure,t63%is the characteristic time when63%of devices fail,andβis the Weibull slope.βis an indicator of device variation within the sample set.If the oxides in all the capacitors are intrinsic and only one breakdown mechanism leads to a device failure,a largeβvalue should be expected.The more deviation from the intrinsic quality of the oxide is or when multiple mechanisms dominate the oxide breakdown,the smaller wouldβbe.

The Weibull slope is known to be hard to determine accu-rately without a very large sample size[29].Fig.3shows failure distributions of MOS capacitors with various areas stressed at 8.09MV/cm and275◦C.After removal of obvious extrinsic

Fig.4.More accurate method to extract Weibull slopeβusing the area-

scaling relationship of t63%.βwith95%confidence intervalsfitted from Weibull distributions are also plotted on the secondary y-axis for

comparison. Fig.5.Weibull distributions of MOS capacitors of various sizes scaled to 200μm×200μm using a Weibull slope of7.42.The stress conditions are

275◦C and8.09MV/cm.

failures,the characteristic lifetimes(t63%)and Weibull slopes (β)are plotted and shown in Fig.4with error bars indicat-ing the95%confidence intervals calculated by the maximum likelihood estimation.It can be seen thatβhas large confidence intervals with a sample size of20.The large range ofβ,which varies from3to14,makes it difficult to utilizeβas an indicator of oxide quality.

In order to determineβmore accurately,area scaling is performed.One unique property of the Weibull statistics is that the distributions obtained for two different areas are shifted vertically by a distance proportional to the logarithm of the area ratio as shown by(2)[30].Equation(3),derived from(2),shows that by plotting t63%as a function of area in a log–log scale,βcan be calculated from the inverse of the slope.In Fig.4,theβvalue determined from area scaling is7.42.The95%confidence intervals of t63%are relatively smaller in a log scale,so the βvalue obtained from area scaling of t63%has substantially smaller error.Using the aforementionedβvalue,the Weibull distributions are scaled to an area of200μm×200μm.As shown in Fig.5,all the distributions fall on top of each other, which also confirms that theβvalue determined using the previous method is much more accurate than those extracted from the slope of the failure distributions,i.e.,

t63%

t 63%

=

A

A

1/β

(2)

log10t 63%−log10t63%=−

1

β

(log10A −log10A).(3)

There is no model that can predict what should theβvalue be for thick oxides with intrinsic quality.Therefore,while the more accurateβobtained earlier can be used to compare oxide quality relatively between two processes,it still cannot answer yet the question whether the oxide is intrinsic.

Here,the area dependence ofβis presented as a possible indicator that the good reliability results reported in this paper are still not indicative of intrinsic reliability,and there is still a room for improvement.

In Fig.4,the Weibull slope versus capacitor area is plotted on the secondary axis.Although the95%confidence intervals are large,there is a trend thatβpeaks at the area of100μm×100μm and decreases as the area deviates from the peak point. This trend is not as expected if there is only one extrinsic failure mechanism involved in addition to the intrinsic oxide breakdown,in which case,as the oxide area shrinks,the chance of involving extrinsic defects should decrease,and therefore,βshould increase for smaller areas.The observed trend does not agree with this expectation and suggests that there might be more than two breakdown mechanisms contributing to the failure distributions.In the case of three breakdown mech-anisms,t I63%C.Activation Energy

Both the E and1/E models assume an Arrhenius temperature dependence in the form of t BD∝exp(E a/kT),where E a is

Fig.6.Weibull distributions of MOS capacitors with various sizes.The stress conditions are275◦C and9.36MV/cm.As the area deviates from100μm×100μm,the distributions show more bimodal

characteristics.

Fig.7.Area dependence of Weibull slopeβat three different electricfields shows peaks at the area of100μm×100μm.This dependence is an indication that the oxide on SiC has not reached the intrinsic regime yet.

the thermal activation energy required for oxide breakdown.

These models also predict that E a should be dependent on

electricfield.In the early studies of SiO2on Si,E a was

observed to decrease as a function of applied gate voltage

[31]–[33].However,not all the oxides exhibit such a voltage de-

pendence,as discussed in[32]and[33].McPherson and Mogul

also developed a model that shows that thefield-independent

activation energy can be the result of two or more disturbed

bonding states[34].While many efforts have been spent on

the characterizations of E a in SiO2/Si system,only very few values of activation energy have been reported on SiO2/SiC system.Senzaki et al.reported the activation energies for

Al gate and poly-Si gate thermal oxides to be0.59–0.79eV

and0.34–0.72eV,respectively[35].

Fig.8shows the Arrhenius plots for the capacitors with area

of200μm×200μm at the four temperatures investigated.

Each of the data points is extracted from the lifetime distrib-

ution of20devices.The error bars indicate95%confidence

intervals.It can be seen that the activation energy is around

0.9eV for all of the electricfields in the range from8.09

to9.36MV/cm.The activation energy does not appear

to Fig.8.Arrhenius plots at various stressfields for capacitors with area of

200μm×200μm.The activation energy does not exhibit dependence within the electric-field range shown.Error bars indicate95%confidence

intervals. Fig.9.Electric-field acceleration of MOS capacitors and three generations of

DMOSFETs measured at250◦C.

exhibit an electric-field dependence within the electric-field range investigated.

D.Oxide Reliability of DMOSFET

Studies of oxide reliability of SiC DMOSFETs have shown great improvement in recent years.Thefield-dependent char-acteristic lifetimes are shown in Fig.9for the DMOSFETs developed in years2006,2007,and2008.The reliability has been improved by two orders of magnitude.t63%measured at the same temperature on200μm×200μm capacitors are also shown for comparison in Fig.9.It can be seen that the reliability of DMOSFET is getting closer to that of the capacitor.It should be noted that the active area of the DMOSFET is5.4×10−3cm−2,and the area of the capacitor is4×10−4cm−2.If area scaling is performed,the two reliability curves should even be closer.

The Weibull slopes extracted from the failure distributions of 4H-SiC DMOSFETs and capacitors are shown and compared in Fig.10with the95%confidence intervals indicated by the error bars.Theβvalue in the Weibull distribution of DMOSFET failures is significantly poorer compared with the capacitor-failure distribution.This can also be seen by inspecting the Weibull distributions shown in Figs.11and12.The Weibull

Fig.10.Weibull slopes extracted for MOS capacitors and DMOSFETs with 95%confidence

intervals.

Fig.11.Weibull distributions as a function of electricfields measured on SiC MOS capacitors of size200μm×200μm at T=250◦

C.

Fig.12.Weibull distributions as a function of electricfields measured on SiC DMOSFETs with an active area of5.4×10−3cm2at T=250◦C.

plots of DMOSFETs are more nonlinear than the capacitors, which is expected because additional extrinsic defects might be caused by the extra processing steps necessary to form the structure of the DMOSFETs.Future work is necessary to minimize the extrinsic failures and improve the reliability of the SiC

DMOSFETs.Fig.13.Improvements of oxide reliability on SiC over the past15years. These data are measured on200μm×200μm MOS capacitors at350◦C. E.Examination of Early Prediction on Oxide Reliability

The observed excellent lifetimes clearly demonstrate that the widespread belief that silicon oxide on SiC will never be reliable at high temperatures is incorrect.Therefore,the arguments that lead to the misconception should be reexamined. The main observation leading to the belief that silicon oxide cannot be reliable on SiC is the early experimental data of oxide reliability as discussed in the Introduction[8],[9].However, with continuous advances in processing technologies,the oxide lifetime on SiC has been improved steadily in the past15years. Fig.13shows lifetime projections with the MTTF measured on state-of-the-art MOS capacitors in years1993,2006,and 2008with the same temperature stress of350◦C.The projected lifetimes at used condition(3MV/cm)are0.5h,3years, and200years,respectively.Our data measured at375◦C in this paper are also plotted for comparison.The observed good reliability data are strong evidence that SiO2on SiC is reliable. Nothing fundamental is responsible for these improvements other than better processing technology.As mentioned earlier, even these recent good results are not yet the limit,and addi-tional improvement can be expected.

The smaller conduction-band offset compared with Si leads to the concern that oxide reliability on SiC is physically limited. While a smaller conduction-band offset should indeed lead to shorter lifetime,the question is“by how much?”Singh and Hefner[10]projected a reduction by1.5×based on the reduction of conduction-band offset.They further reasoned that,since the electricfield is kept below4–5MV/cm at a rated temperature of125◦C for commercial Si nMOSFETs, one could expect that the electricfield for the SiC system cannot exceed3MV/cm.It is not clear what the basis is for the 1.5×reduction prediction.For thick oxides,the intrinsic break-down process is believed to be a feedback runaway process [36]–[38].It mainly depends on the tunneling current through the oxide.The oxide on SiC is as reliable as the oxide on Si when they have the same level of tunneling current.Fig.14 shows the FN tunneling current for the two barrier heights(as-suming identical effective mass in the substrate).If the SiO2/Si system has a breakdownfield of5MV/cm,then the SiO2/SiC system should have a breakdownfield of∼4.1MV/cm.If the

424IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY,VOL.10,NO.4,DECEMBER

2010

Fig.14.Theoretical FN tunneling current at ΦB =2.7and 3.1eV for SiC/SiO 2and Si/SiO 2systems,respectively.m SiC =0.37m 0and m ox =0.42m 0are assumed in the

calculations.

Fig.15.FN plots of gate leakage current measured at room temperature and 200◦C.Effective barrier heights are extracted from the middle section of the curves as it is less affected by charge trapping or system leakage.

effective mass and the impact ionization are taken into account,then the breakdown field of SiO 2/SiC should get even higher.It should also be noted that the 5-MV/cm specification for silicon is ultraconservative,set during the time the silicon industry was still learning to minimize extrinsic defects [39].More modern data suggest that the silicon system can support higher fields [40],[41].The previous quantitative analysis shows that the breakdown field of SiO 2on SiC is much higher than Singh and Hefner predicted [10].

Considering the concern that the effective barrier height decreases significantly with increasing temperature as Agarwal et al.[11]and Waters and Van Zeghbroeck [12]reported,the I –V characteristics of the capacitors are measured at different temperatures,and Φeffvalues are extracted from the FN plot.As shown in Fig.15,the FN curves deviate from the expected linear behavior at both low fields and high fields.Therefore,Φeffvaries by fitting different portions of the curve.The bending at high fields is caused by charge trapping.This is further shown in Fig.16where two consecutive I –V sweeps on the same device are shown.The leakage current in the second sweep is larger than the initial sweep except at very high voltages.The interpretation is that,during

the

Fig.16.I –V characteristics measured on a MOS capacitor with two consec-utive sweeps.The larger leakage current in the second sweep is due to charge trapping in the oxide.

initial sweep,charges are trapped in the oxide when the field is high enough,and the trapped charge increases the leakage current by modifying the tunneling barrier in the subsequent I –V measurements.The fact that the two curves merge at high voltages indicates that during the initial sweep,the I –V characteristic is already distorted by the trapped charge.The method of using the FN plot to extract Φeffassumes that the leakage current measured is purely due to FN tunneling.This is not true in the SiC-based MOS system in which substantial amount of oxide traps exist both at the interface and in the bulk.Trap-assisted tunneling as well as distorted electric fields in the oxide due to charge trapping all distort the FN plot.Therefore,the Φeffextracted using this FN method is questionable.

Even if this questionable Φeffextraction method is employed by fitting the FN plot at moderate electric fields,which are less distorted by either charge trapping at high fields or system leakage at low fields,the effective barrier height does not change dramatically at high temperatures.The extracted Φeffvalues are 2.57eV at room temperature and 2.36eV at 200◦C with ΔΦeff/ΔT ∼1.2meV/K,which is much smaller com-pared with the 2.6meV/K [11]reported by Agarwal et al.and 3.0meV/K [12]reported by Waters and Van Zeghbroeck.This much smaller temperature dependence of Φeffmay be the result of the significantly improved oxide quality compared with ten years ago as the amount of traps that distorts the FN tunneling have been reduced greatly.

IV .S UMMARY

Constant-voltage-stress TDDB measurements have been per-formed on 4H-SiC MOS capacitors and DMOSFETs with stress temperature between 225◦C and 375◦C and electric field between 6and 10MV/cm.Long-term stress experiments over seven months in duration have been done at 6MV/cm and 300◦C.The field-acceleration factor is around 1.5dec/(MV/cm)for all of the temperatures.Lifetime projection sug-gests a maximum operating electric field of 3.9MV/cm for a 100-year lifetime at 375◦C.The thermal activation energy is found to be ∼0.9eV ,independent of the electric field within the range investigated.The reliability of SiC DMOSFETs has been

improved significantly over the past three years.Compared with the MOS capacitors,the Weibull slopes of the failure distributions of DMOSFETs are significantly poorer than that of the capacitors due to additional processing steps.Future work is required to minimize the extrinsic failures and improve the reliability of SiC DMOSFETs.

Area scaling is shown to be a more accurate method to extract Weibull slopeβ.The area dependence ofβis discussed and shown to be a possible indication that the oxide quality has not reached the intrinsic regime,and further improvements of oxide reliability is possible.

Our reliability data contradict the widely accepted belief that silicon oxide on SiC is fundamentally limited by its smaller conduction-band offset compared with Si.A detailed discussion has been provided to examine the arguments of the early predictions.

R EFERENCES

[1]A.L.Spetz,A.Baranzahi,P.Tobias,and I.Lundstrom,“High temperature

sensors based on metal–insulator-silicon carbide devices,”Phys.Stat.

Sol.(A),vol.162,no.1,pp.493–511,Jul.1997.

[2]P.G.Neudeck,R.S.Okojie,and C.Liang-Yu,“High-temperature

electronics—A role for wide bandgap semiconductors?”Proc.IEEE, vol.90,no.6,pp.1065–1076,Jun.2002.

[3]N.G.Wright,A.B.Horsfall,and K.Vassilevski,“Prospects for SiC

electronics and sensors,”Mater.Today,vol.11,no.1/2,pp.16–21, Jan./Feb.2008.

[4]M.Mehregany,C.A.Zorman,N.Rajan,and W.Chien Hung,“Silicon

carbide MEMS for harsh environments,”Proc.IEEE,vol.86,no.8, pp.1594–1609,Aug.1998.

[5]A.J.Lelis, D.Habersat,R.Green, A.Ogunniyi,M.Gurfinkel,

J.Suehle,and N.Goldsman,“Time dependence of bias-stress-induced SiC MOSFET threshold-voltage instability measurements,”IEEE Trans.

Electron Devices,vol.55,no.8,pp.1835–1840,Aug.2008.

[6]M.Gurfinkel,H.D.Xiong,K.P.Cheung,J.S.Suehle,J.B.Bernstein,

Y.Shapira,A.J.Lelis,D.Habersat,and N.Goldsman,“Characterization of transient gate oxide trapping in SiC MOSFETs using fast I–V tech-niques,”IEEE Trans.Electron Devices,vol.55,no.8,pp.2004–2012, Aug.2008.

[7]L.C.Yu,K.P.Cheung,J.S.Suehle,J.P.Campbell,K.Sheng,A.J.Lelis,

and S.-H.Ryu,“Channel hot-carrier effect of4H-SiC MOSFET,”Mater.

Sci.Forum,vol.615–617,pp.813–816,2009.

[8]L.A.Lipkin and J.W.Palmour,“Insulator investigation on SiC for

improved reliability,”IEEE Trans.Electron Devices,vol.46,no.3, pp.525–532,Mar.1999.

[9]M.M.Maranowski and J.A.Cooper,Jr.,“Time-dependent-dielectric-

breakdown measurements of thermal oxides on n-type6H-SiC,”IEEE Trans.Electron Devices,vol.46,no.3,pp.520–524,Mar.1999.

[10]R.Singh and A.R.Hefner,“Reliability of SiC MOS devices,”Solid State

Electron.,vol.48,no.10/11,pp.1717–1720,Oct./Nov.2004.

[11]A.K.Agarwal,S.Seshadri,and L.B.Rowland,“Temperature dependence

of Fowler–Nordheim current in6H-and4H-SiC MOS capacitors,”IEEE Electron Device Lett.,vol.18,no.12,pp.592–594,Dec.1997.

[12]R.Waters and B.Van Zeghbroeck,“Temperature-dependent tunneling

through thermally grown SiO2on n-type4H-and6H-SiC,”Appl.Phys.

Lett.,vol.76,no.8,pp.1039–1041,Feb.2000.

[13]K.Matocha and R.Beaupre,“Time-dependent dielectric breakdown

of thermal oxides on4H-SiC,”Mater.Sci.Forum,vol.556/557,pp.675–678,2007.

[14]L.Yu,K.P.Cheung,J.Campbell,J.S.Suehle,and S.Kuang,

“Oxide reliability of SiC MOS devices,”in Proc.IEEE Int.IRW, 2008,pp.141–144.

[15]K.Fujihira,N.Miura,K.Shiozawa,M.Imaizumi,K.Ohtsuka,and

T.Takami,“Successful enhancement of lifetime for SiO2on4H-SiC by N2O anneal,”IEEE Electron Device Lett.,vol.25,no.11,pp.734–736, Nov.2004.

[16]T.Suzuki,J.Senzaki,T.Hatakeyama,K.Fukuda,T.Shinohe,and K.Arai,

“Reliability of4H-SiC(000-1)MOS gate oxide using N2O nitridation,”

Mater.Sci.Forum,vol.615–617,pp.557–560,2009.

[17]T.Suzuki,J.Senzaki,T.Hatakeyama,K.Fukuda,T.Shinohe,and

K.Arai,“Effect of gate wet reoxidation on reliability and channel mo-

bility of metal–oxide–semiconductorfield-effect transistors fabricated on 4H-SiC(000-1),”Mater.Sci.Forum,vol.600–603,p.791,2009. [18]K.Fujihira,S.Yoshida,N.Miura,Y.Nakao,M.Imaizumi,T.Takami,

and T.Oomori,“TDDB measurement of gate SiO2on4H-SiC formed by chemical vapor deposition,”Mater.Sci.Forum,vol.600–603,p.799, 2009.

[19]J.Senzaki,K.Kojima,and K.Fukuda,“Effects of n-type4H-SiC epitaxial

wafer quality on reliability of thermal oxides,”Appl.Phys.Lett.,vol.85, no.25,pp.6182–6184,Dec.2004.

[20]J.Senzaki,K.Kojima,T.Kato,A.Shimozato,and K.Fukuda,“Corre-

lation between reliability of thermal oxides and dislocations in n-type 4H-SiC epitaxial wafers,”Appl.Phys.Lett.,vol.,no.2,p.022909, Jul.2006.

[21]K.Matocha,G.Dunne,S.Soloviev,and R.Beaupre,“Time-dependent

dielectric breakdown of4H-SiC MOS capacitors and DMOSFETs,”IEEE Trans.Electron Devices,vol.55,no.8,pp.1830–1834,Aug.2008.

[22]S.Krishnaswami,S.-H.Ryu,B.Heath,A.Agarwal,J.Palmour,B.Geil,

A.Lelis,and C.Scozzie,“A study on the reliability and stability of high

voltage4H-SiC MOSFET devices,”Mater.Sci.Forum,vol.527–529, pp.1313–1316,2006.

[23]E.Y.Wu,J.H.Stathis,and L.-K.Han,“Ultra-thin oxide reliability for

ULSI applications,”Semicond.Sci.Technol,vol.15,no.5,pp.425–435, May2000.

[24]J.W.McPherson and D.A.Baglee,“Acceleration factors for thin gate

oxide stressing,”in Proc.23rd Annu.IEEE Reliab.Phys.Symp.,1985, pp.1–5.

[25]I.-C.Chen,S.E.Holland,and C.Hu,“Electrical breakdown in thin gate

and tunneling oxides,”IEEE Trans.Electron Devices,vol.ED-32,no.2, pp.413–422,Feb.1985.

[26]J.McPherson,V.Reddy,K.Banerjee,and L.Huy,“Comparison of E and

1/E TDDB models for SiO2under long-term/low-field test conditions,”in IEDM Tech.Dig.,1998,pp.171–174.

[27]J.S.Suehle and P.Chaparala,“Low electricfield breakdown of thin SiO2

films under static and dynamic stress,”IEEE Trans.Electron Devices, vol.44,no.5,pp.801–808,May1997.

[28]U.Schwalke,M.Pölzl,T.Sekinger,and M.Kerber,“Ultra-thick gate

oxides:Charge generation and its impact on reliability,”Microelectron.

Reliab.,vol.41,no.7,pp.1007–1010,Jul.2001.

[29]E.Y.Wu,W.W.Abadeer,H.Liang-Kai,L.Shin-Hsien,and

G.R.Hueckel,“Challenges for accurate reliability projections in the ultra-

thin oxide regime,”in Proc.37th Annu.IEEE Int.Reliab.Phys.Symp., 1999,pp.57–65.

[30]J.H.Stathis,“Percolation models for gate oxide breakdown,”J.Appl.

Phys.,vol.86,no.10,pp.5757–5766,Nov.1999.

[31]M.Kimura,“Oxide breakdown mechanism and quantum physical chem-

istry for time-dependent dielectric breakdown,”in Proc.35th Annu.IEEE Int.Reliab.Phys.Symp.,1997,pp.190–200.

[32]J.S.Suehle,P.Chaparala,C.Messick,W.M.Miller,and K.C.Boyko,

“Field and temperature acceleration of time-dependent dielectric break-down in intrinsic thin SiO2,”in Proc.32nd Annu.IEEE Int.Reliab.Phys.

Symp.,1994,pp.120–125.

[33]J.S.Suehle,E.M.V ogel,B.Wang,and J.B.Bernstein,“Temperature

dependence of soft breakdown and wear-out in sub-3nm SiO2films,”in Proc.38th Annu.IEEE Int.Reliab.Phys.Symp.,2000,pp.33–39. [34]J.W.McPherson and H.C.Mogul,“Disturbed bonding states in SiO2

thin-films and their impact on time-dependent dielectric breakdown,”in Proc.36th Annu.IEEE Int.Reliab.Phys.Symp.,1998,pp.47–56. [35]J.Senzaki,A.Shimozatob,and K.Fukuda,“Acceleration factors in accel-

eration life test of thermal oxides on4H-SiC wafers,”Mater.Sci.Forum, vol.556/557,pp.635–638,2007.

[36]T.H.DiStefano and M.Shatzkes,“Impact ionization model for dielectric

instability and breakdown,”Appl.Phys.Lett.,vol.25,no.12,pp.685–687, Dec.1974.

[37]D.J.DiMaria,D.Arnold,and E.Cartier,“Impact ionization and positive

charge formation in silicon dioxidefilms on silicon,”Appl.Phys.Lett., vol.60,no.17,pp.2118–2120,Apr.1992.

[38]N.Klein and P.Solomon,“Current runaway in insulators affected by

impact ionization and recombination,”J.Appl.Phys.,vol.47,no.10, pp.43–4372,Oct.1976.

[39]C.Hu,“Gate oxide scaling limits and projection,”in IEDM Tech.Dig.,

1996,pp.319–322.

[40]E.Y.Wu,J.Suñé,W.Lai, A.Vayshenker, E.Nowak,and

D.Harmon,“Critical reliability challenges in scaling SiO2-based dielec-

tric to its limit,”Microelectron.Reliab.,vol.43,no.8,pp.1175–1184, Aug.2003.

[41]“Process integration,devices,and structures,”International Technology

Roadmap for Semiconductors(ITRS).2007Edition.

426IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY,VOL.10,NO.4,DECEMBER

2010

Liangchun C.Yu received the B.S.degree in physics from Nanjing University,Nanjing,China,in 2003,the M.S.degree in material science from the National University of Singapore (Singapore–MIT Alliance),Singapore,Singapore,in 2004,and the Ph.D.degree in electrical engineering from Rutgers University,New Brunswick,NJ,in 2010.

From 2008to 2010,she was a Guest Researcher with the National Institute of Standards and Technol-ogy,Gaithersburg,MD,where she evaluated oxide reliability of SiC MOS devices and developed a

wafer-level Hall mobility measurement technique.She is currently with General Electric Global Research,Niskayuna,NY .She has authored and coauthored over 20journal and conference papers.Her research interests include reliability of semiconductor devices,development of wide-bandgap power devices and development of novel characterization techniques.

Dr.Yu served as the Vice Chair for arrangements of the 2009IEEE Interna-tional Integrated Reliability

Workshop.

Greg T.Dunne received the B.S.degree in materials science and engineering from North Carolina State University,Raleigh,in 1996.

He has been a Process Engineer,focusing on wide-bandgap materials growth and characterization,with Northrop Grumman,Sterling Semiconductor,Aixtron,and,currently,with General Electric Global Research,Niskayuna,NY

.

Kevin S.Matocha (S’95–M’03)received the B.S.degree in electrical engineering from Louisiana Tech University,Ruston,in 1995and the M.S.and Ph.D.degrees in electrical engineering from the Rensselaer Polytechnic Institute (RPI),Troy,NY ,in 1998and 2003,respectively.

As a Research Assistant with RPI,he designed advanced Si MOS-gated thyristors and developed a noncontact technique for characterizing recombina-tion processes in SiC.His doctoral work examined the capabilities of GaN MOSFETs for high-voltage

switching applications.Since 2000,he has been with the General Electric Global Research,Niskayuna,NY ,where he develops wide-bandgap devices,including SiC and GaN power transistors.

Dr.Matocha has served as the Schenectady Section Chair of the IEEE Electron Devices Society since

2006.

Kin P.Cheung received the Ph.D.degree in physical chemistry from New York University,New York,in 1983.

From 1983to 1985,he was a Postdoctoral Fellow with Bell Laboratories during which he pioneered Terahertz Spectroscopy.From 1985to 2001,he was a member of the technical staff,Bell Laboratories,Murray Hill,NJ.From 2001to 2006,he was an Associate Professor with Rutgers University,New Brunswick,NJ.He is currently a Project Leader with the Semiconductor Electronics Division,National

Institute of Standards and Technology,Gaithersburg,MD.He published over 150refereed journal and conference papers.He authored a book on plasma-charging damage and a book chapter and edited three conference proceedings.He served in the committee of a number of international conferences and has given tutorial in ten international conferences.His area of interest covers VLSI technology/devices and

MEMS/NEMS.

John S.Suehle received the B.S.,M.S.,and Ph.D.degrees in electrical engineering from the University of Maryland,College Park,in 1980,1982,and 1988,respectively.

In 1981,he was with the National Institute of Stan-dards and Technology (NIST),Gaithersburg,MD,on a Graduate Research Fellowship.Since 1982,he has been with the Semiconductor Electronics Division,NIST,where he is Leader of the CMOS and novel devices group.He has authored or coauthored over 200technical papers or conference proceedings and

is the holder of five U.S.patents.His research activities include failure and wear-out mechanisms in semiconductor devices,radiation effects in microelec-tronic devices,microelectromechanical systems,and metrology issues relating to future electronic devices.

Dr.Suehle is a member of Eta Kappa Nu.He currently serves as an Editor of the IEEE T RANSACTIONS ON E LECTRON D EVICES and has served as a guest editor of the IEEE T RANSACTIONS ON D EVICE AND M ATERIALS R ELIABILITY .He served as General Chair of the 2008International Reliability Physics Symposium and has served on the management committee of the IEEE Integrated Reliability Workshop.He also serves on the executive management committee of the IEEE International Electron Devices

Meeting.

Kuang Sheng (M’99–SM’08)received the B.Sc.degree in electrical engineering from Zhejiang Uni-versity,Hangzhou,China,in 1995,and the Ph.D.degree in electrical engineering from Heriot-Watt University,Edinburgh,U.K.,in 1999.

He was a Postdoctoral Research Associate with Cambridge University,Cambridge,U.K.,between 1999and 2002.He was with Rutgers University,New Brunswick,NJ,where he worked as an Assis-tant Professor and a tenured Professor.He is cur-rently with Zhejiang University.He led a team that

reported the first power IC on SiC.He has published approximately 90technical papers in international journals and conferences and is a holder of a patent.His research interests include all aspects of power semiconductor devices and ICs on SiC and Si.

Dr.Sheng serves as an Associate Editor of the IEEE T RANSACTIONS ON P OWER E LECTRONICS and the IEEE T RANSACTIONS ON I NDUSTRIAL A PPLICATIONS .