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1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.
Features
General Description
•Wide Input Voltage from 4.3V to 14V •Output Current up to 3A
•Adjustable Output Voltage from 0.8V to V IN - ±2% System Accuracy
•70m Ω Integrated Power MOSFETs •High Efficiency up to 95%
- Automatic Skip/PWM Mode Operation •
Current-Mode Operation
- Easy Feedback Compensation
- Stable with Low ESR Output Capacitors - Fast Load/Line Transient Response
•Power-On-Reset Monitoring
•Fixed 500kHz Switching Frequency in PWM mode •Built-in Digital Soft-Start and Soft-Stop
•Current-Limit Protection with Frequency Foldback •118% Over-Voltage Protection
•Hiccup-Mode 50% Under-Voltage Protection •Over-Temperature Protection
•<3µA Quiescent Current in Shutdown Mode • Small SOP-8 Package
•
Lead Free and Green Devices Available (RoHS Compliant)
Applications
•OLPC, UMPC
•Notebook Computer
• Handheld Portable Device
•
Step-Down Converters Requiring High Efficiency
and 3A Output Current
Output Current, I OUT (A)
E f f i c i e n c y , (%)
01020304050607080901000.001
0.01
0.1
1
10
For high efficiency over all load current range, the APW7142 is equipped with an automatic Skip/PWM mode operation. At light load, the IC operates in the Skip mode,which keeps a constant minimum inductor peak current,to reduce switching losses. At heavy load, the IC works in PWM mode, which inductor peak current is programmed by the COMP voltage, to provide high efficiency and excel-lent output voltage regulation.
The APW7142 is also equipped with power-on-reset,soft-start, soft-stop, and whole protections (under-voltage,over-voltage, over-temperature, and current-limit) into a single package. In shutdown mode, the supply current drops below 3µA.
This device, available in an 8-pin SOP-8 package, pro-vides a very compact system solution with minimal exter-nal components and PCB area.
The APW7142 is a 3A synchronous-rectified Buck con-verter with integrated 70m Ω power MOSFETs. The APW7142, designed with a current-mode control scheme,can convert wide input voltage of 4.3V to 14V to the output voltage adjustable from 0.8V to VIN to provide excellent output voltage regulation.
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2Ordering and Marking Information
Absolute Maximum Ratings (Note 1)
Note 1 : Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device.Thermal Characteristics
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Pin Configuration
1234
8765
LX LX EN COMP
PGND VIN AGND
FB
APW7142
SOP-8Top View
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J -STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).
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3
Note 3: Refer to the Typical Application Circuits
Recommended Operating Conditions (Note 3)
Electrical Characteristics
Refer to the typical application circuits. These specifications apply over V IN =12V, V OUT =3.3V and T A = -40 ~ 85°C, unless otherwise specified. Typical values are at T A =25°C.
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4Electrical Characteristics (Cont.)
Refer to the typical application circuits. These specifications apply over V IN =12V, V OUT =3.3V and T A = -40 ~ 85°C, unless otherwise specified. Typical values are at T A =25°C.
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5
Typical Operating Characteristics
VIN Input Current vs. Supply Voltage
Supply Voltage, V IN (V)
V I N I n p u t C u r r e n t , I V I N (m A )
Current Limit Level (Peak Current)
vs. Junction Temperature
Junction Temperature, T J (o
C) Output Voltage vs. Supply Voltage
Supply Voltage, V IN (V)
Output Current vs. Efficiency
Output Voltage vs. Output Current
Output Current, I OUT (A)Output Current, I OUT (A)
O u t p u t V o l t a g e , V O U T (V )
E f f i c i e n c y , (%)
O u t p u t V o l t a g e , V O U T (V )
C u r r e n t L i m i t L e v e l , I L I M (A )
R e f e r e n c e V o l t a g e , V R E F (V )
Junction Temperature, T J (o C)
Reference Voltage vs. Junction Temperature
(Refer to the application circuit 1 in the section “Typical Application Circuits”, V IN =12V, V OUT =3.3V, L1=4.7µH)
0.0
0.5
1.0
1.5
2.0
024681012
14
0.784
0.7880.7920.7960.8000.8040.8080.812
0.816
-50
-25
25
50
75
100
125
150
4.55
5.5
6
6.5
7
-40
-20
20
40
60
80
100120140 3.2
3.22
3.243.263.283.33.323.343.363.38
3.44681012
14
102030405060708090
100
3.2
3.223.24
3.263.283.33.323.343.363.383.4
1
2
3
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6Typical Operating Characteristics (Cont.)
Oscillator Frequency vs.Junction Temperature
O s c i l l a t o r F r e q u e n c y , F O S C (k H z )
Junction Temperature, T J (o
C)
(Refer to the application circuit 1 in the section “Typical Application Circuits”, V IN =12V, V OUT =3.3V, L1=4.7µ
H)
450
460470480490500510520530540
550
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7Enable
Shutdown
V EN
V OUT
I L1
CH1 : V EN , 5V/div CH3 : I L1, 2A/div Time : 100µs/div
CH2 : V OUT , 2V/div I OUT =3A
CH1 : V EN , 5V/div CH3 : I L1 , 2A/div Time : 1ms/div
CH2 : V OUT , 2V/div V EN
V OUT
I L1
I OUT =3A
Operating Waveforms
Power On Power Off
(Refer to the application circuit 1 in the section “Typical Application Circuits”, V IN =12V, V OUT =3.3V, L1=4.7µH)
CH1 : V IN , 5V/div CH2 : V OUT , 2V/div Time : 1ms/div
CH3 : I L1 , 2A/div V IN
V OUT
I L1
I OUT =3A CH1 : V IN , 5V/div CH2 : V OUT , 2V/div Time : 10ms/div
CH3 : I L1 , 2A/div V IN
V OUT
I L1
I OUT =3A
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8Operating Waveforms (Cont.)
Load Transient Response
Load Transient Response
(Refer to the application circuit 1 in the section “Typical Application Circuits”, V IN =12V, V OUT =3.3V, L1=4.7µH)
V OUT
I L1
CH1 : V OUT , 200mV/div CH2 : I L1 , 2A/div Time : 100µs/div
I OUT = 50mA-> 3A ->50mA I OUT rising/falling time=10µs
CH1 : V OUT , 100mV/div CH2 : I L1 , 2A/div Time : 100µs/div
I L1
V OUT
I OUT = 0.5A-> 3A ->0.5A I OUT rising/falling time=10µs Short Circuit
Short Circuit
V LX
V OUT
I L1
CH1 : V LX , 5V/div
CH2 : V OUT , 200mV/div CH3 : I L1 , 5A/div Time : 5ms/div
V OUT is shorted to GND by a short wire
CH1 : V LX , 10V/div CH2 : V OUT , 2V/div CH3 : I L1 , 5A/div Time : 20µs/div
I OUT =3~7A
V Lx
V OUT
I L1
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9Operating Waveforms (Cont.)
Line Transient
(Refer to the application circuit 1 in the section “Typical Application Circuits”, V IN =12V, V OUT =3.3V, L1=4.7µH)
Over Voltage Protection
V IN
V OUT
I L1V LX
CH1 : V IN , 5V/div CH2 : V OUT , 2V/div CH4 : I L1 , 5A/div Time : 20µs/div
CH3 : V LX , 5V/div V IN
V OUT
I L1
CH1 : V IN , 5V/div
CH2 : V OUT , 50mV/div (Voffset=3.3V)Time : 100µs/div
CH3 : I L1 , 2A/div V IN = 5~12V V IN rising/falling time=20µs
Switching Waveform
Switching Waveform
CH1 : V LX , 5V/div CH2 : I L1 , 2A/div Time : 1µs/div I L1
V LX
I OUT =0.2A
CH1 : V LX , 5V/div CH2 : I L1 , 2A/div Time : 1µs/div
V LX
I L1
I OUT =3A
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10Pin Description
Block Diagram
LX
PGND
AGND
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11Typical Application Circuits
1. 4.3~14V Single Power Input Step-Down Converter (with a Ceramic Output Capacitor)
a. Cost-effective Feedback Compensation (C4 is not connected)
b. Fast-Transient-Response Feedback Compensation (C4 is connected)
V OUT
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12Typical Application Circuits (Cont.)
2. +12V Single Power Input Step-Down Converter (with an Electrolytic Output Capacitor)
OUT F Ω)
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13Function Description
Over-Voltage Protection (OVP)
The over-voltage function monitors the output voltage by FB pin. When the FB voltage increases over 118% of the reference voltage due to the high-side MOSFET failure or for other reasons, the over-voltage protection comparator will force the low-side MOSFET gate driver high. This ac-tion actively pulls down the output voltage and eventually attempts to blow the internal bonding wires. As soon as the output voltage is within regulation, the OVP compara-tor is disengaged. The chip will restore its normal operation. This OVP scheme only clamps the voltage overshoot, and does not invert the output voltage when otherwise activated with a continuously high output from low-side MOSFET driver - a common problem for OVP schemes with a latch.
Over-Temperature Protection (OTP)
The over-temperature circuit limits the junction tempera-ture of the APW7142. When the junction temperature ex-ceeds T J = +150o C, a thermal sensor turns off the both power MOSFETs, allowing the devices to cool. The ther-mal sensor allows the converters to start a start-up pro-cess and to regulate the output voltage again after the junction temperature cools by 40o C. The OTP is designed with a 40o C hysteresis to lower the average T J during continuous thermal overload conditions, increasing life-time of the APW7142.Enable/Shutdown
Driving EN to the ground initiates a soft-stop process and then places the APW 7142 in shutdown. W hen in shutdown, after the soft-stop process is completed, the internal power MOSFET s turn off, all internal circuitry shuts down and the quiescent supply current reduces to less than 3µA.
VIN Power-On-Reset (POR)
The APW7142 keeps monitoring the voltage on VIN pin to prevent wrong logic operations which may occur when VIN voltage is not high enough for the internal control circuitry to operate. The VIN POR has a rising threshold of 4.1V (typical) with 0.5V of hysteresis.
During startup, the VIN voltage must exceed the enable voltage threshold. Then the IC starts a start-up process and ramps up the output voltage to the voltage target.Digital Soft-Start
The APW7142 has a built-in digital soft-start to control the rise rate of the output voltage and limit the input current surge during start-up. During soft-start, an internal volt-age ramp (V RAMP ), connected to one of the positive inputs of the error amplifier, rises up from 0V to 0.95V to replace the reference voltage (0.8V) until the voltage ramp reaches the reference voltage.
During soft-start without output over-voltage, the APW7142converter’s sinking capability is disabled until the output voltage reaches the voltage target.Digital Soft-Stop
At the moment of shutdown controlled by EN signal, un-der-voltage event or over-temperature protection, the APW7142 initiates a digital soft-stop process to discharge the output voltage in the output capacitors. Certainly, the load current also discharges the output voltage.During soft-stop, the internal voltage ramp (V RAMP ) falls down rises from 0.95V to 0V to replace the reference voltage. Therefore, the output voltage falls down slowly at the light load. After the soft-stop interval elapses, the soft-stop process ends and the the IC turns on the low-side power MOSFET.
Output Under-Voltage Protection (UVP)
In the operational process, if a short-circuit occurs, the output voltage will drop quickly. Before the current-limit circuit responds, the output voltage will fall out of the re-quired regulation range. The under-voltage continually monitors the FB voltage after soft-start is completed. If a load step is strong enough to pull the output voltage lower than the under-voltage threshold, the IC shuts down converter’s output.
The under-voltage threshold is 50% of the nominal out-put voltage. The under-voltage comparator has a built-in
2µs noise filter to prevent the chips from wrong UVP shut-down being caused by noise. The under-voltage protec-tion works in a hiccup mode without latched shutdown.The IC will initiate a new soft-start process at the end of the preceding delay.
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14Current-Limit Protection
The APW7142 monitors the output current, flows through the high-side power MOSFET, and limits the current peak at current-limit level to prevent loads and the IC from dam-aging during overload or short-circuit conditions.Frequency Foldback
The foldback frequency is controlled by the FB voltage.When the output is shortened to the ground, the frequency of the oscillator will be reduced to 80kHz. This lower fre-quency allows the inductor current to safely discharge,thereby preventing current runaway. The oscillator’s fre-quency will gradually increase to its designed rate when the feedback voltage on the FB again approaches 0.8V.
Function Description (Cont.)
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15Application Information
Figure 1 Converter Waveforms
(1)
........... (2)L
· F D)-(1 · V I OSC OUT =
∆
IN
V OUT
I
OUT
V LX
I L
I Q1I COUT
I OUT
V OUT
V V D IN
OUT
=
(3)
ESR
.I V ESR ⋅∆=(V)
C F 8I
V OUT
OSC COUT ⋅⋅∆=
∆ (4)
(V)
ESR I V OUT ⋅∆=∆ (5)
Setting Output Voltage
The regulated output voltage is determined by:
(V) )R R (10.8V 2
1
OUT +
×=Suggested R2 is in the range from 1k to 20k Ω. For por-table applications, a 10k resistor is suggested for R2. To prevent stray pickup, please locate resistors R1 and R2close to APW7142.Input Capacitor Selection
Use small ceramic capacitors for high frequency decoupling and bulk capacitors to supply the surge cur-rent needed each time the P-channel power MOSFET (Q1)turns on. Place the small ceramic capacitors physically close to the VIN and between the VIN and the GND.The important parameters for the bulk input capacitor are the voltage rating and the RMS current rating. For reliable operation, select the bulk capacitor with voltage and cur-rent ratings above the maximum input voltage and larg-est RMS current required by the circuit. The capacitor volt-age rating should be at least 1.25 times greater than the maximum input voltage and a voltage rating of 1.5 times is a conservative guideline. The RMS current (I RMS ) of the bulk input capacitor is calculated as the following equation:
where D is the duty cycle of the power MOSFET .
For a through hole design, several electrolytic capacitors may be needed. For surface mount designs, solid tanta-lum capacitors can be used, but caution must be exer-cised with regard to the capacitor surge current rating.
Output Capacitor Selection
An output capacitor is required to filter the output and sup-ply the load transient current. The filtering requirements are the function of the switching frequency and the ripple current (∆I). The output ripple is the sum of the voltages,having phase shift, across the ESR, and the ideal output capacitor. The peak-to-peak voltage of the ESR is calcu-lated as the following equations:
(A)
D)-(1D I I OUT RMS ××=The peak-to-peak voltage of the ideal output capacitor is
calculated as the following equations:
For the applications using bulk capacitors, the ∆V COUT is
much smaller than the V ESR and can be ignored. Therefore,the AC peak-to-peak output voltage (∆V OUT ) is shown as below:
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Application Information (Cont.)
Output Capacitor Selection (Cont.)
where Inductor Value Calculation
(6)
IN(MAX)IN V V =1.2
V · L · 500000)
V -(V · V IN
OUT IN OUT ≤(H)
V · 600000)V -(V · V L IN
OUT IN OUT ≥For the applications using ceramic capacitors, the V ESR is much smaller than the ∆V COUT and can be ignored.Therefore, the AC peak-to-peak output voltage (∆V OUT ) is close to ∆V COUT .
The load transient requirements are the function of the slew rate (di/dt) and the magnitude of the transient load current. These requirements are generally met with a mix of capacitors and careful layout. High frequency capaci-tors initially supply the transient and slow the current load rate seen by the bulk capacitors. The bulk filter capacitor values are generally determined by the ESR (Effective Series Resistance) and voltage rating requirements rather than actual capacitance requirements.
High frequency decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance in the circuit board wiring that could cancel the usefulness of these low inductance components. An aluminum electrolytic capacitor’s ESR value is related to the case size with lower ESR available in larger case sizes. However, the Equiva-lent Series Inductance (ESL) of these capacitors increases with case size and can reduce the usefulness of the ca-pacitor to the high slew-rate transient loading.
The operating frequency and inductor selection are inter-related in that higher operating frequencies permit the use of a smaller inductor for the same amount of inductor ripple current. However, this is at the expense of efficiency due to an increase in MOSFET gate charge losses. The equation (2) shows that the inductance value has a direct effect on ripple current.
Accepting larger values of ripple current allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ∆I ≤ 0.4x I OUT(MAX) . Remember, the maximum ripple current occurs at the maximum input voltage. The minimum inductance of the inductor is cal-culated by using the following equation:
Layout Consideration
In high power switching regulator, a correct layout is im-portant to ensure proper operation of the regulator. In general, interconnecting impedance should be minimized by using short and wide printed circuit traces. Signal and power grounds are to be kept separating and finally com-bined using the ground plane construction or single point grounding. Figure 2 illustrates the layout, with bold lines indicating high current paths. Components along the bold lines should be placed close together. Below is a check-list for your layout:
Firstly, to initial the layout by placing the power components. Orient the power circuitry to achieve a clean power flow path. If possible, make all the con-nections on one side of the PCB with wide and copper filled areas.
OUT
+V -
In Figure 2, the loops with same color bold lines con-duct high slew rate current. These interconnecting im-pedances should be minimized by using wide and short printed circuit traces.
Keep the sensitive small signal nodes (FB, COMP)away from switching nodes (LX or others) on the PCB.Therefore place the feedback divider and the feedback compensation network close to the IC to avoid switch-ing noise. Connect the ground of feedback divider di-rectly to the AGND pin of the IC using a dedicated ground trace.
1.2.3.
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17Place the decoupling ceramic capacitor C1 near the VIN as close as possible. Use a wide power ground plane to connect the C1 and C2 to provide a low im-pedance path between the components for large and high slew rate current.
Figure 3 Recommended Layout Diagram
Application Information (Cont.)
4.Layout Consideration (Cont.)
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18
Package Information
SOP-8
S Y M B O L
MIN.
MAX.
1.750.100.170.250.25
A A1c D E E1e h L MILLIMETERS b 0.310.51SOP-8
0.250.500.40 1.27MIN.
MAX.
INCHES
0.0690.0040.0120.0200.0070.0100.0100.0200.0160.0500
0.010
1.27 BSC
0.050 BSC
A2 1.250.049
0°8°
0°
8
°
SEE VIEW A
5
°
VIEW A SEATING PLANE
GAUGE PLANE Note: 1. Follow JEDEC MS-012 AA.
2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side.
3.80
5.804.80 4.00
6.205.000.10.1970.2280.2440.150
0.157
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19
(mm)
Devices Per Unit
Carrier Tape & Reel Dimensions
SECTION B-B
SECTION A-A
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20
Reflow Condition (IR/Convection or VPR Reflow)
Reliability Test Program
T L
T P
25
T e m p e r a t u r e
Taping Direction Information
SOP-8
USER DIRECTION OF FEED
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21
Classification Reflow Profiles
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan Tel : 886-3-52000Fax : 886-3-52050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838Fax : 886-2-2917-3838
